Ultra-thin-body （UTB） In0.53Ga0.47As-on-insulator （In0.53Ga0.47As-OI） structures with thicknesses of 8 and 15nm are realized by transferring epitaxially grown In0.53Ga0.47As layers to silicon substrates with 15-nm...Ultra-thin-body （UTB） In0.53Ga0.47As-on-insulator （In0.53Ga0.47As-OI） structures with thicknesses of 8 and 15nm are realized by transferring epitaxially grown In0.53Ga0.47As layers to silicon substrates with 15-nmthick A12 03 as a buried oxide by using the direct wafer bonding method. Back gate n-channel metal-oxidesemiconductor field-effect transistors （nMOSFETs） are fabricated by using these In0.53Ga0.47As-OI structures with excellent electrical characteristics. Positive bias temperature instability （PBTI） and hot carrier injection （HCI） characterizations are performed for the In0.53Ga0.47As-OI nMOSFETs. It is confirmed that the In0.53Ga0.47 As-OI nMOSFETs with a thinner body thickness suffer from more severe degradations under both PBTI and HCr stresses. Moreover, the different evolutions of the threshold voltage and the saturation current of the UTB In0.53Ga0.47As-OI nMOSFETs may be due to the slow border traps.展开更多
In this paper, we have studied hot carrier injection （HCI） different degradations are obtained from the experiment results. under alternant stress. Under different stress modes, The different alternate stresses can ...In this paper, we have studied hot carrier injection （HCI） different degradations are obtained from the experiment results. under alternant stress. Under different stress modes, The different alternate stresses can reduce or enhance the HC effect, which mainly depends on the latter condition of the stress cycle. In the stress mode A （DC stress with electron injection）, the degradation keeps increasing. In the stress modes B （DC stress and then stress with the smMlest gate injection） and C （DC stress and then stress with hole injection under Vg = 0 V and Vd = 1.8 V）, recovery appears in the second stress period. And in the stress mode D （DC stress and then stress with hole injection under Vg = -1.8 V and Vd = 1.8 V）, as the traps filled in by holes can be smaller or greater than the generated interface states, the continued degradation or recovery in different stress periods can be obtained.展开更多
Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of H...Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of Hu's lifetime prediction model have a close relationship with oxide thickness.Furthermore,a linear relationship is found between m and n .Based on this result,the lifetime prediction model can be expended to the device with thinner oxides.展开更多
Although hot carriers induced degradation of NMOSFETs has been studied for decades, the role of hot electron in this process is still debated. In this paper, the additional substrate hot electrons have been intentiona...Although hot carriers induced degradation of NMOSFETs has been studied for decades, the role of hot electron in this process is still debated. In this paper, the additional substrate hot electrons have been intentionally injected into the oxide layer to analyze tile role of hot electron in hot carrier degradation. The enhanced degradation and the decreased time exponent appear with the injected hot electrons increasing, the degradation increases from 21.80% to 62.00% and the time exponent decreases from 0.59 to 0.27 with Vb decreasing from 0 V to -4 V, at the same time, the recovery also becomes remarkable and which strongly depends on the post stress gate bias Vg. Based on the experimental results, more unrecovered interface traps are created by the additional injected hot electron from the breaking Si-H bond, but the oxide trapped negative charges do not increase after a rapid recovery.展开更多
Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-...Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-stress-induced damage at Vg = Vd, where Vd is the voltage of the transistor drain, increases as temperature rises, contrary to conventional hot carrier behaviour, which is identified as being related to the NBTI. A comparison between the actions of NBTI and hot carriers at low and high gate voltages shows that the damage behaviours are quite different： the low gate voltage stress results in an increase in transconductance, while the NBTI-dominated high gate voltage and high temperature stress causes a decrease in transconductance. It is concluded that this can be a major source of hot carrier damage at elevated temperatures and high gate voltage stressing of p-channel metal-oxide-semiconductor field-effect transistors （PMOSFETs）. We demonstrate a novel mode of NBTI-enhanced hot carrier degradation in PMOSFETs. A novel method to decouple the actions of NBTI from that of hot carriers is also presented.展开更多
Gate current for pMOSFETs is composed of direct tunneling current,channel hot hole,electron injection current,and highly energetic hot holes by secondary impact ionization.The device degradation under V g=V d/2 is m...Gate current for pMOSFETs is composed of direct tunneling current,channel hot hole,electron injection current,and highly energetic hot holes by secondary impact ionization.The device degradation under V g=V d/2 is mainly caused by the injection of hot electrons by primary impact ionization and hot holes by secondary impact ionization,and the device lifetime is assumed to be inversely proportional to the hot holes,which is able to surmount Si-SiO 2 barrier and be injected into the gate oxide.A new lifetime prediction model is proposed on the basis and validated to agree well with the experiment.展开更多
基于0.18μm CMOS工艺开发了抗总剂量辐射加固技术,制备的1.8 V NMOS器件常态性能良好,器件在500 krad(Si)剂量点时,阈值电压与关态漏电流无明显变化。研究器件的热载流子效应,采用体电流Isub/漏电流Id模型评估器件的HCI寿命,寿命达到5...基于0.18μm CMOS工艺开发了抗总剂量辐射加固技术,制备的1.8 V NMOS器件常态性能良好,器件在500 krad(Si)剂量点时,阈值电压与关态漏电流无明显变化。研究器件的热载流子效应,采用体电流Isub/漏电流Id模型评估器件的HCI寿命,寿命达到5.75年,满足在1.1 Vdd电压下工作寿命大于0.2年的规范要求。探索总剂量辐射效应与热载流子效应的耦合作用,对比辐照与非辐照器件的热载流子损伤,器件经辐照并退火后,受到的热载流子影响变弱。评估加固工艺对器件HCI可靠性的影响,结果表明场区总剂量加固工艺并不会造成热载流子损伤加剧的问题。展开更多
基金Supported by the National Program on Key Basic Research Project of China under Grant No 2011CBA00607the National Natural Science Foundation of China under Grant Nos 61106089 and 61376097the Zhejiang Provincial Natural Science Foundation of China under Grant No LR14F040001
文摘Ultra-thin-body （UTB） In0.53Ga0.47As-on-insulator （In0.53Ga0.47As-OI） structures with thicknesses of 8 and 15nm are realized by transferring epitaxially grown In0.53Ga0.47As layers to silicon substrates with 15-nmthick A12 03 as a buried oxide by using the direct wafer bonding method. Back gate n-channel metal-oxidesemiconductor field-effect transistors （nMOSFETs） are fabricated by using these In0.53Ga0.47As-OI structures with excellent electrical characteristics. Positive bias temperature instability （PBTI） and hot carrier injection （HCI） characterizations are performed for the In0.53Ga0.47As-OI nMOSFETs. It is confirmed that the In0.53Ga0.47 As-OI nMOSFETs with a thinner body thickness suffer from more severe degradations under both PBTI and HCr stresses. Moreover, the different evolutions of the threshold voltage and the saturation current of the UTB In0.53Ga0.47As-OI nMOSFETs may be due to the slow border traps.
基金supported by the National Key Science and Technology Special Project,China (Grant No. 2008ZX01002-002)the grant from the Major State Basic Research Development Program of China (973 Program,No. 2011CB309606)the Fundamental Research Funds for the Central Universities (Grant No. JY10000904009)
文摘In this paper, we have studied hot carrier injection （HCI） different degradations are obtained from the experiment results. under alternant stress. Under different stress modes, The different alternate stresses can reduce or enhance the HC effect, which mainly depends on the latter condition of the stress cycle. In the stress mode A （DC stress with electron injection）, the degradation keeps increasing. In the stress modes B （DC stress and then stress with the smMlest gate injection） and C （DC stress and then stress with hole injection under Vg = 0 V and Vd = 1.8 V）, recovery appears in the second stress period. And in the stress mode D （DC stress and then stress with hole injection under Vg = -1.8 V and Vd = 1.8 V）, as the traps filled in by holes can be smaller or greater than the generated interface states, the continued degradation or recovery in different stress periods can be obtained.
文摘Hot carrier induced (HCI) degradation of surface channel n MOSFETs with different oxide thicknesses is investigated under maximum substrate current condition.Results show that the key parameters m and n of Hu's lifetime prediction model have a close relationship with oxide thickness.Furthermore,a linear relationship is found between m and n .Based on this result,the lifetime prediction model can be expended to the device with thinner oxides.
基金supported by the National Natural Science Foundation of China(Grant No.61376109)the Opening Project of National Key Laboratory of Science and Technology on Reliability Physics and Application Technology of Electrical Component,China(Grant No.ZHD201202)
文摘Although hot carriers induced degradation of NMOSFETs has been studied for decades, the role of hot electron in this process is still debated. In this paper, the additional substrate hot electrons have been intentionally injected into the oxide layer to analyze tile role of hot electron in hot carrier degradation. The enhanced degradation and the decreased time exponent appear with the injected hot electrons increasing, the degradation increases from 21.80% to 62.00% and the time exponent decreases from 0.59 to 0.27 with Vb decreasing from 0 V to -4 V, at the same time, the recovery also becomes remarkable and which strongly depends on the post stress gate bias Vg. Based on the experimental results, more unrecovered interface traps are created by the additional injected hot electron from the breaking Si-H bond, but the oxide trapped negative charges do not increase after a rapid recovery.
基金Project supported by the National Natural Science Foundation of China （Grant No 60206006）. the Program for New Century Excellent Talents of Ministry of Education of China （Grant No 681231366）. the National Defense Pre-Research Foundation of China （Grant No 51408010305DZ0168） and the Key Project of Chinese Ministry of Education （Grant No 104172）.
文摘Hot carrier injection （HCI） at high temperatures and different values of gate bias Vg has been performed in order to study the actions of negative bias temperature instability （NBTI） and hot carriers. Hot-carrier-stress-induced damage at Vg = Vd, where Vd is the voltage of the transistor drain, increases as temperature rises, contrary to conventional hot carrier behaviour, which is identified as being related to the NBTI. A comparison between the actions of NBTI and hot carriers at low and high gate voltages shows that the damage behaviours are quite different： the low gate voltage stress results in an increase in transconductance, while the NBTI-dominated high gate voltage and high temperature stress causes a decrease in transconductance. It is concluded that this can be a major source of hot carrier damage at elevated temperatures and high gate voltage stressing of p-channel metal-oxide-semiconductor field-effect transistors （PMOSFETs）. We demonstrate a novel mode of NBTI-enhanced hot carrier degradation in PMOSFETs. A novel method to decouple the actions of NBTI from that of hot carriers is also presented.
基金国家重点基础研究发展计划 ( No.G2 0 0 0 0 3 65 0 3 ) Motorola Digital DNA Laboratory资助项目~~
文摘Gate current for pMOSFETs is composed of direct tunneling current,channel hot hole,electron injection current,and highly energetic hot holes by secondary impact ionization.The device degradation under V g=V d/2 is mainly caused by the injection of hot electrons by primary impact ionization and hot holes by secondary impact ionization,and the device lifetime is assumed to be inversely proportional to the hot holes,which is able to surmount Si-SiO 2 barrier and be injected into the gate oxide.A new lifetime prediction model is proposed on the basis and validated to agree well with the experiment.
