A new Single-Resistance-Controlled (SRC) sinusoidal oscillator using single Voltage Differencing-Differential Input Buffered Amplifier (VD-DIBA), only four passive components (two capacitors and two resistors), is pre...A new Single-Resistance-Controlled (SRC) sinusoidal oscillator using single Voltage Differencing-Differential Input Buffered Amplifier (VD-DIBA), only four passive components (two capacitors and two resistors), is presented. The proposed structure provides the following advantageous features: 1) independent control of oscillation frequency and condition of oscillation and 2) low active and passive sensitivities. The effects of non-idealities of the VD-DIBA on the proposed oscillator have also been investigated. The proposed SRC sinusoidal oscillator has been checked for robustness using Monte-Carlo simulation. SPICE simulation results have been included using 0.35 μm MIETEC technology to confirm the validity of the proposed SRC sinusoidal oscillator.展开更多
针对高速数字视频系统印刷电路板(PCB)设计中由于传输线的高频特性导致的信号完整性问题,通过输入/输出缓冲器信息规范(input/output buffer information specification,IBIS)模型对TI公司提供的TMS320DM642芯片扩展的外部存储器的反射...针对高速数字视频系统印刷电路板(PCB)设计中由于传输线的高频特性导致的信号完整性问题,通过输入/输出缓冲器信息规范(input/output buffer information specification,IBIS)模型对TI公司提供的TMS320DM642芯片扩展的外部存储器的反射仿真以及对同步动态随机存储器(SDRAM)的时序仿真来优化数字视频系统的PCB的设计.结果表明,使用这些设计方案可以有效地提高信号完整性,从而增强高速数字视频系统的可靠性.展开更多
文摘A new Single-Resistance-Controlled (SRC) sinusoidal oscillator using single Voltage Differencing-Differential Input Buffered Amplifier (VD-DIBA), only four passive components (two capacitors and two resistors), is presented. The proposed structure provides the following advantageous features: 1) independent control of oscillation frequency and condition of oscillation and 2) low active and passive sensitivities. The effects of non-idealities of the VD-DIBA on the proposed oscillator have also been investigated. The proposed SRC sinusoidal oscillator has been checked for robustness using Monte-Carlo simulation. SPICE simulation results have been included using 0.35 μm MIETEC technology to confirm the validity of the proposed SRC sinusoidal oscillator.
文摘针对高速数字视频系统印刷电路板(PCB)设计中由于传输线的高频特性导致的信号完整性问题,通过输入/输出缓冲器信息规范(input/output buffer information specification,IBIS)模型对TI公司提供的TMS320DM642芯片扩展的外部存储器的反射仿真以及对同步动态随机存储器(SDRAM)的时序仿真来优化数字视频系统的PCB的设计.结果表明,使用这些设计方案可以有效地提高信号完整性,从而增强高速数字视频系统的可靠性.
