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Review on the Usage of Synchronous and Asynchronous FIFOs in Digital Systems Design
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作者 Dongwei Hu Yuejun Lei Linan Wang 《Engineering(科研)》 2024年第3期61-82,共22页
First-Input-First-Output (FIFO) buffers are extensively used in contemporary digital processors and System-on-Chips (SoC). There are synchronous FIFOs and asycnrhonous FIFOs. And different sized FIFOs should be implem... First-Input-First-Output (FIFO) buffers are extensively used in contemporary digital processors and System-on-Chips (SoC). There are synchronous FIFOs and asycnrhonous FIFOs. And different sized FIFOs should be implemented in different ways. FIFOs are used not only for the pipeline design within a processor, for the inter-processor communication networks, for example Network-on-Chips (NoCs), but also for the peripherals and the clock domain crossing at the whole SoC level. In this paper, we review the interface, the circuit implementation, and the various usages of FIFOs in various levels of the digital design. We can find that the usage of FIFOs could greatly facilitate the signal storage, signal decoupling, signal transfer, power domain separation and power domain crossing in digital systems. We hope that more attentions are paid to the usages of synchronous and asynchronous FIFOs and more sophististicated usages are discovered by the digital design communities. 展开更多
关键词 First-Input-First-Output SYSTEM-ON-CHIP NETWORK-ON-CHIP Advanced eXtensible interface ASYNCHRONOUS
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Optimization of junction termination extension for ultrahigh voltage 4H-SiC planar power devices 被引量:4
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作者 Tongtong Yang Song Bai Runhua Huang 《Journal of Semiconductors》 EI CAS CSCD 2017年第4期45-50,共6页
Numerical simulations on the optimization of junction termination extension(JTE) have been performed.Various termination techniques have been applied and simulated in this paper,such as single-zone JTE(S-JTE),mult... Numerical simulations on the optimization of junction termination extension(JTE) have been performed.Various termination techniques have been applied and simulated in this paper,such as single-zone JTE(S-JTE),multi-zone JTE(M-JTE),and space-modulated JTE(SM-JTE).A completely novel and efficient method is demonstrated in this paper to determine total length of SM-JTE,and it is verified through simulation results.The simulation results show that the SM-JTE could provide a protection efficiency(defined in Section 2) of 95.2%,which is much higher than that of M-JTE(82.4%) and S-JTE(64.7%).Based on the fabricated MOSFETs,the interface charge density is extracted and the approximate range of charge density has been determined.The influences of different interface charge densities have been investigated for the three termination techniques respectively.According to the previous reports,the JTE is quite sensitive to the implanted dose,so the blocking capability of each termination structure with different implanted doses is also simulated.The results show that when interface charge is considered,the SM-JTE always shows an enormous advantage over the other two junction termination structures,however the interface charge densities varied.The space-modulated JTE is also applicable to the power planar devices such as MOSFETs and IGBTs,which would provide a very promising lower fabrication cost. 展开更多
关键词 4H-SiC junction termination extension interface charge TCAD
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Design and implementation of a portable TPM scheme for general-purpose trusted computing based on EFI 被引量:4
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作者 Lei HAN Jiqiang LIU +1 位作者 Zhen HAN Xueye WEI 《Frontiers of Computer Science》 SCIE EI CSCD 2011年第2期169-180,共12页
In today's globalized digital world, networkbased, mobile, and interactive collaborations have enabled work platforms of personal computers to cross multiple geographical boundaries. The new requirements of privacy-p... In today's globalized digital world, networkbased, mobile, and interactive collaborations have enabled work platforms of personal computers to cross multiple geographical boundaries. The new requirements of privacy-preservation, sensitive information sharing, portability, remote attestation, and robust security create new problems in system design and implementation. There are critical demands for highly secure work platforms and security enhancing mechanisms for ensuring privacy protection, component integrity, sealed storage, and remote attestation of platforms. Trusted computing is a promising technology for enhancing the security of a platform using a trusted platform module (TPM). TPM is a tamper-resistant microcontroller designed to provide robust security capabilities for computing platforms. It typically is affixed to the motherboard with a low pin count (LPC) bus. However, it limited in that TPM cannot be used directly in current common personal computers (PCs), and TPM is not flexible and portable enough to be used in different platforms because of its interface with the PC and its certificate and key structure. For these reasons, we propose a portable trusted platform module (PTPM) scheme to build a trusted platform for the common PC based on a single cryptographic chip with a universal serial bus (USB) interface and extensible firmware interface (EFI), by which platforms can get a similar degree of security protection in general-purpose systems. We show the structure of certificates and keys, which can bind to platforms via a PTPM and provide users with portability and flexibility in different platforms while still allowing the user and platform to be protected and attested. The implementation of prototype system is described in detail and the performance of the PTPM on cryptographic operations and time-costs of the system bootstrap are evaluated and analyzed. The results of experiments show that PTPM has high performances for supporting trusted computing and it can be used flexibly and portably by the user. 展开更多
关键词 trusted computing portable trusted platform module (PTPM) extensible firmware interface (EFI) KEYS CERTIFICATES
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