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Over 12%efficient kesterite solar cell via back interface engineering 被引量:1
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作者 Yunhai Zhao Zixuan Yu +8 位作者 Juguang Hu Zhuanghao Zheng Hongli Ma Kaiwen Sun Xiaojing Hao Guangxing Liang Ping Fan Xianghua Zhang Zhenghua Su 《Journal of Energy Chemistry》 SCIE EI CAS CSCD 2022年第12期321-329,I0008,共10页
Kesterite Cu_(2)ZnSn(S,Se)_(4)(CZTSSe)has attracted considerable attention as a non-toxic and earthabundant solar cell material.During selenization of CZTSSe film at high temperature,the reaction between CZTSSe and Mo... Kesterite Cu_(2)ZnSn(S,Se)_(4)(CZTSSe)has attracted considerable attention as a non-toxic and earthabundant solar cell material.During selenization of CZTSSe film at high temperature,the reaction between CZTSSe and Mo is one of the main reasons that result in unfavorable absorber and interface quality,which leads to large open circuit voltage deficit(VOC-def)and low fill factor(FF).Herein,a WO_(3)intermediate layer introduced at the back interface can effectually inhibit the unfavorable interface reaction between absorber and back electrode in the preliminary selenization progress;thus high-quality crystals are obtained.Through this back interface engineering,the traditional problems of phase segregation,voids in the absorber and over thick Mo(S,Se)_(2)at the back interface can be well solved,which greatly lessens the recombination in the bulk and at the interface.The increased minority carrier diffusion length,decreased barrier height at back interface contact and reduced deep acceptor defects give rise to systematic improvement in VOCand FF,finally a 12.66%conversion efficiency for CZTSSe solar cell has been achieved.This work provides a simple way to fabricate highly efficient solar cells and promotes a deeper understanding of the function of intermediate layer at back interface in kesterite-based solar cells. 展开更多
关键词 Cu_(2)ZnSn(S Se)_(4) WO_(3)intermediate layer Crystal growth Minority carrier diffusion length interface contact quality
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Improved interfacial properties of HfGdON gate dielectric Ge MOS capacitor by optimizing Gd content
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作者 周琳 刘璐 +2 位作者 邓煜恒 李春霞 徐静平 《Chinese Physics B》 SCIE EI CAS CSCD 2019年第12期331-337,共7页
High-quality dielectric/Ge interface and low gate leakage current are crucial issues for high-performance nanoscaled Ge-based complementary metal–oxide–semiconductor(CMOS) device. In this paper, the interfacial and ... High-quality dielectric/Ge interface and low gate leakage current are crucial issues for high-performance nanoscaled Ge-based complementary metal–oxide–semiconductor(CMOS) device. In this paper, the interfacial and electrical properties of high-k Hf Gd ON/La Ta ON stacked gate dielectric Ge metal–oxide–semiconductor(MOS) capacitors with different gadolinium(Gd) contents are investigated. Experimental results show that when the controlling Gd content is a suitable value(e.g., 13.16%), excellent device performances can be achieved: low interface-state density(6.93 × 10^11 cm^-2·e V-1), small flatband voltage(0.25 V), good capacitance–voltage behavior, small frequency dispersion, and low gate leakage current(2.29× 10^-6 A/cm^2 at Vg = Vfb + 1 V). These could be attributed to the repair of oxygen vacancies, the increase of conduction band offset, and the suppression of germanate and suboxide Ge Ox at/near the high k/Ge interface by doping suitable Gd into Hf ON. 展开更多
关键词 Ge MOS devices HfGdON dielectric interface quality leakage current density
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Vertical GaN Shottky barrier diode with thermally stable TiN anode
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作者 刘大平 李小波 +3 位作者 蒲涛飞 李柳暗 成绍恒 王启亮 《Chinese Physics B》 SCIE EI CAS CSCD 2021年第3期479-482,共4页
Vertical GaN Schottky barrier diodes with Ti N anodes were fabricated to investigate the electrical performance. The turn-on voltage and specific on-resistance of diodes are deduced to be approximately 0.41 V and 0.98... Vertical GaN Schottky barrier diodes with Ti N anodes were fabricated to investigate the electrical performance. The turn-on voltage and specific on-resistance of diodes are deduced to be approximately 0.41 V and 0.98 mΩ·cm2, respectively.The current-voltage curves show rectifying characteristics under different temperatures from 25℃ to 200℃, implying a good thermal stability of Ti N/Ga N contact. The low-frequency noise follows a 1/f behavior due to the multiple traps and/or barrier inhomogeneous at Ti N/Ga N interface. The trapping/de-trapping between traps and Fermi level causes the slight capacitance dispersion under reverse voltage. 展开更多
关键词 GAN Vertical Schottky barrier diode TIN interface quality
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