Spin-controlled generation of a complete polarization set with randomly-interleaved plasmonic metasurfaces

Optical metasurfaces,comprising subwavelength quasi-planar nanostructures,constitute a universal platform for manipulating the amplitude,phase,and polarization of light,thus paving a way for the next generation of highly integrated multifunctional optical devices.In this work,we introduce a reflective metasurface for the generation of a complete(angularly resolved)polarization set by randomly interleaving anisotropic plasmonic meta-atoms acting as nanoscale wave plates.In the proof-of-concept demonstration,we achieve multidirectional beam-steering into different polarization channels forming a complete set of polarization states,which can also be dynamically altered by switching the spin of incident light.The developed design concept represents a significant advancement in achieving flat polarization optics with advanced functionalities.

A design scheme for interference suppression based on CWBIM

An interference suppression design scheme based on conjugate weighted butterfly interleaving mapping(CWBIM)is proposed for inter-carrier interference(ICI)and inter-subband interference(IBI)in the received signals of universal filtered multi-carrier(UFMC)systems.It applies an interleaving mapping operation to subtract the interference coefficients of adjacent terms in ICI and IBI twice,thereby achieving suppression effects similar to the self-cancellation(SC)algorithm while maintaining the original data transmission efficiency.Meanwhile,conjugate and complex weighting operations can effectively suppress the impact of phase rotation errors in high-speed mobile channel environments,thereby further improving the bit error rate(BFR)performance of the system,Moreover,butterfly operation can effectively control the computational complexity of the interleaving mapping process.Theoretical analysis and simulation results show that,compared with the PSC-UFMC algorithm,the CWBIM-UFMC scheme proposed in this paper can effectively suppress ICI and IBI in the received signal without compromising data transmission efficiency and reducing computational complexity,thereby achieving good BER performance of the system.

HY-PC:Enabling Consistent Positioning and Communication Using Visible Light

Visible light(VL)plays an important role in achieving high-precision positioning and low bit error radio(BER)data communication.However,most VL-based systems can not achieve positioning and communication,simultaneously.There are two problems:1)the hybrid systems are difficult to extract distinguishable positioning beacon features without affecting communication performance,2)in the hybrid systems,the lost data bits in the inter-frame gap(IFG)are hard to recover,which affects positioning and communication performance.Therefore,in this article,we propose a novel VL-based hybrid positioning and communication system,named HY-PC system,to solve the above problems.First,we propose the robust T-W mapping for recognizing specific Light Emitting Diodes(LEDs),which can provide stable LED recognition accuracy without adding extra beacon data and does not decrease the communication rate.Furthermore,we also propose the novel linear block coding and bit interleaving mechanism,which can recover the lost data bits in the IFG and improve data communication performance.Finally,we use commercial off-the-shelf devices to implement our HY-PC system,extensive experimental results show that our HY-PC system can achieve consistent high-precision positioning and low-BER data communication,simultaneously.

Fuzzy Based Interleaved Step-up Converter for Electric Vehicle

This work focuses on the fuzzy controller for the proposed three-phase interleaved Step-up converter(ISC).The fuzzy controller for the proposed ISC converters for electric vehicles has been discussed in detail.The proposed ISC direct current(DC-DC)converter could also be used in automobiles,satellites,industries,and propulsion.To enhance voltage gain,the proposed ISC Converter combines boost converter and interleaved converter(IC).This design also reduces the number of switches.As a result,ISC converter switching losses are reduced.The proposed ISC Converter topology can produce a 143 V output voltage and 1 kW of power.Due to the high voltage gain of this converter design,it is suitable for medium and high-power systems.The proposed ISC Converter topology is simulated in MATLAB/Simulink.The simulated output displays a high output voltage.But the output voltage contains maximum ripples.Fuzzy proposes an ISC Converter which makes closed loop responsiveness and reduces the output voltage ripple.The proposed ISC converter has the lowest ripple output voltage,which is less than 2%,because the duty cycle is regulated using the fuzzy logic controller.It offers high voltage gain,minimal ripple,and low switching loss.The performance of the proposed converter is compared to that of the fuzzy and Pro-portional Integral(PI)controllers implemented in MATLAB.

Improved Interleaved Single-Ended Primary Inductor-Converter forSingle-Phase Grid-Connected System

The generation of electricity based on renewable energy sources,parti-cularly Photovoltaic(PV)system has been greatly increased and it is simply insti-gated for both domestic and commercial uses.The power generated from the PV system is erratic and hence there is a need for an efficient converter to perform the extraction of maximum power.An improved interleaved Single-ended Primary Inductor-Converter(SEPIC)converter is employed in proposed work to extricate most of power from renewable source.This proposed converter minimizes ripples,reduces electromagnetic interference due tofilter elements and the contin-uous input current improves the power output of PV panel.A Crow Search Algo-rithm(CSA)based Proportional Integral(PI)controller is utilized for controlling the converter switches effectively by optimizing the parameters of PI controller.The optimized PI controller reduces ripples present in Direct Current(DC)vol-tage,maintains constant voltage at proposed converter output and reduces over-shoots with minimum settling and rise time.This voltage is given to single phase grid via 1�Voltage Source Inverter(VSI).The command pulses of 1�VSI are produced by simple PI controller.The response of the proposed converter is thus improved with less input current.After implementing CSA based PI the efficiency of proposed converter obtained is 96%and the Total Harmonic Distor-tion(THD)is found to be 2:4%.The dynamics and closed loop operation is designed and modeled using MATLAB Simulink tool and its behavior is performed.

A Holistic Approach to Enhance FRCS General Surgery Examination Training Using Adult Learning Model: A Non-Profit Initiative

Objectives: To evaluate the impact of adult learning and simulation-based learning (SBL) on surgical trainees’ learning experiences and Fellowship of the Royal College of Surgeons (FRCS) Section 2 General Surgery examination pass rate. Methods: This was a cross-sequential study involving 148 surgical candidates (72 UK trainees, 75 non-UK trainees) who had attended our revision course (Phoenix FRCS Course) from June 2017 until 2023. Each course comprised a two-day weekend preparation with dedicated sections for clinical, viva, and academic reading, incorporating SBL as its key learning style. We maintained a prospective database of candidate and course details, examination results, and feedback since the course inception. Results: We found that 97% of candidates passed the FRCS examination after their first attempt. The course was attended once by 89% of candidates, and only 3 of the 148 candidates exhausted all four attempts at the examination. Candidate feedback for the course and its style of learning was positive, with simulation-based table viva sessions and virtual clinical sessions proving the most popular learning sessions (95% and 80% of candidates attending courses run in December 2017, April 2018, and May 2021 rated them “Excellent” respectively). Conclusions: The course is centered around shared adult learning and mindfulness tools to encourage candidates to learn from each other and develop confidence and mastery in all domains of surgical practice. These methods have been shown to be effective in achieving high success rates in the Intercollegiate and International FRCS examinations for UK and overseas surgeons.

新兴光子器件——Interleaver

系统介绍了新兴光子器件———Interleaver的特性、实现方法及其在DWDM系统中的应用。结合课题组的工作 ,主要介绍了光纤熔锥非平衡M Z干涉仪型、偏振光干涉晶体双折射型和迈克耳逊干涉仪 +GT反射镜型三种实现方案。

熔锥型光纤耦合器在光通信中的最新应用

综述了熔锥型光纤耦合器在光通信中的最新应用,包括全波耦合器、Interleaver、泵浦合波器及非线性全光开关,说明了熔锥技术的重要性及其活力。

Design and Implementation of Programmable RS Codec Module in Satellite Communication Modem

In the study and implementation of a programmable RS codec module in satellite communication modem, FPGA is used as the kernel in the implementation, while some ASICs are used as necessary assistant measures. The module includes the RS codec unit, the interleaver and deinterleaver unit, the scrambler and descrambler unit and the frame synchronization unit. The module is realized successfully and it can be programmed on-line to meet the requirements of IESS 308/309/310 including many specifications about different service types and data rates. With the implementation combining FPGA with ASICs, size of the circuit is much reduced, its flexibility dramatically increased, and its stability further strengthened. Furthermore, the module is based on the software radio concept and can be easily integrated into the whole satellite communication modem.

基于非均匀取样布拉格光纤光栅Interleaver的设计

对于光纤通信领域有限的带宽资源,波分复用与解复用器件Interleaver是未来密集型波分复用(DWDM)光纤通信网中的关键器件。为此结合非均匀取样光栅Interleaver的基本设计原理,运用耦合模理论和矩阵传输方法对非均匀取样光纤布拉格光栅的传输特性进行了数值模拟计算,并设计了信道间隔为0.8nm的设计实例,反射谱峰值均匀达到80%～95%,传输通道间隔稳定均匀,时延和色散均匀,时延抖动小于200ps。

一种改善MZI型Interleaver滤波特性新结构的理论研究

根据最近研究的一种改进型光纤Mach-Zehnder干涉仪(MZ1)型Interleaver存在的问题,提出一种改善其滤波特性的新结构．对其原理和相关参数进行了模拟分析,结果表明新结构的光谱形状与隔离度都比原结构有较大改善,且保持了信道的对称性．本文分析计算的结果对器件的优化设计具有实际的指导意义．

群组分波复用器(Interleaver)的薄膜实现方案

运用光学干涉膜系半波层可调、多频滤波技术和"厚腔"多半波矩形修正方法,设计出了膜层少、带宽窄且信道间隔可调的Interleaver器件,给出了50G、100GInterleaver的设计实例,其中心波长、通带宽度(@25dB,@0.5dB)、通带波纹等性能指标完全满足DWDM通信系统的要求。

High-SpeedReal-TimeDataAcquisitionSystem Realized by Interleaving/Multiplexing Technique

The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improved the system conversion rata to 200?MHz and reduced the speed of data transporting and storing to 50?MHz. The high speed HDPLD and ECL logic parts were used to control system timing and the memory address. The multi layer print board and the shield were used to decrease interference produced by the high speed circuit. The system timing was designed carefully. The interleaving/multiplexing technique could improve the system conversion rata greatly while reducing the speed of external digital interfaces greatly. The design resolved the difficulties in high speed system effectively. The experiment proved the data acquisition system is stable and accurate.

适合内存空间受限制设备的多标量乘算法

标量乘及多标量乘算法是实现椭圆曲线密码系统的关键,如何快速高效实现标量乘及多标量乘算法是研究的重点。该文提出一个基于fractionalMOF(mutualoppositeform)的interleaving多标量乘算法,该算法能够充分利用内存空间,因此它非常适用于内存受限的设备。

10 Gbit/s PRBS tester implemented in FPGA

The design of an FPGA（ field programmable gate array） based programmable SONET （synchronous optical network） OC-192 10 Gbit/s PRBS （pseudo-random binary sequence） generator and a bit interleaved polarity 8 （BIP-8） error detector is presented. Implemented in a parallel feedback configuration, this tester features PRBS generation of sequences with bit lengths of 2^7 - 1,2^10- 1,2^15 - 1,2^23 - land 2^31 - 1 for up to 10 Gbit/s applications with a 10 Gbit/s optical transceiver, via the SFI-4 （OC-192 serdes-framer interface）. In the OC-192 frame alignment circuit, a dichotomy search algorithm logic which performs the functions of word alignment and STM-64/OC192 de-frame speeds up the frame sync logic and reduces circuit complexity greatly. The system can be used as a low cost tester to evaluate the performance of OC-192 devices and components, taking the replacement of precious commercial PRBS testers.

用傅立叶光学展宽Interleaver的带宽

简要介绍了Interleaver的原理和应用。在推导、比较马赫-泽德干涉仪型和双折射晶体型Interleaver的传输矩阵的基础上,提出并分析了用傅立叶光学展宽Interleaver带宽的方法。

DWDM系统中的Interleaver技术

目前密集波分复用(DWDM)系统已广泛应用于长途干线、城域网,并扩展至接入网。其中波分复用/解复用器是系统的核心器件之一,而50GHz的密集波分复用更要靠一种交叉波分复用(Interleaver)的全新器件,为此详细阐述了Interleaver的原理、主要实现方案及其特点。

基于双“8”字型光纤谐振环的全光纤三端口Interleaver

为改善全光纤三端口Interleaver的输出特性,提出了一种基于双"8"字型光纤谐振环的对称结构三端口全光纤In-terleaver。该谐振环由一个一字型3×3单模光纤耦合器和两个2×2单模光纤耦合器组成双"8"字型作为输入耦合器,而一个品字型3×3单模光纤耦合器作为输出耦合器。理论和实验分析了该波长交错器的输出特性,结果表明:与两级级联马赫-曾德尔干涉仪型(TCMZI)全光纤三端口Interleaver相比,其输出波形通带更加平坦,通带和阻带加宽,信道间功率旁瓣降低了约24dB。通过实验用光纤熔融拉锥法制作了该器件,结果显示实验结果与理论分析吻合得很好,实验样品的信道间旁瓣值小于-30dB,信道隔离度大于30dB。

Short-span interleaving based selected mapping

A novel interleaving based selected mapping （SLM） scheme to depress the relatively high peak power of transmit signals in multicarrier communications is proposed. In the scheme, a group of bit-level interleavers spanning only a few bits are used to produce multiple sequences representing the same information, and one of the sequences resulting in the lowest peak-to-average power ratio （PAPR） is selected for transmission. The implementation of the scheme including the structure of the short-span interleaver is illustrated. The performance of this PAPR reduction scheme is investigated by simulations. This scheme exhibits a good PAPR reduction performance, and for signals of high level modulation, such as 16QAM and 64QAM, it approaches the best performance of all SLM schemes. Compared to the conventional interleaving SLM, this short-span interleaving SLM results in a very short time delay, requires very few register units for buffering, and can be easily implemented by hardware.

基于马赫-曾德尔干涉仪的全光纤梳状滤波器的研究

交叉复用Interleaver技术已成为解决网络扩容的有效办法。而全光纤型的梳状滤波器由于其优异的特性使其成为交叉复用技术的首选。本文对于几种基于全光纤马赫-曾德尔干涉仪制成的梳状滤波器介绍了他们的数学模型以及对他们的输出光谱等特性进行了仿真和比较,说明了其应用前景及其优异的特性。