DDR5仿真精度研究及在内存升级中的应用

使用Cadence公司的SystemSI对DDR信号通道进行整体仿真,同时,借助一博科技自研的Interposer夹具进行测试,经过多次的仿真测试拟合,所介绍的DDR仿真测试方法可以达到较高的精度。随着对内存带宽的需求不断提升,作为当前主流的DDR4局限性日益明显,通过具体案例说明了DDR5信号完整性提升的具体技术,并通过仿真对比,展示了DDR5在内存升级过程中的优势。

Laparoscopy-assisted percutaneous endoscopic gastrostomy enables enteral nutrition even in patients with distorted anatomy

AIM:To analyzed whether laparoscopy-assisted percutaneous endoscopic gastrostomy(PEG)could be a valuable option for patients with complicated anatomy.METHODS:A retrospective analysis of twelve patients(seven females,five males;six children,six young adults;mean age 19.2 years)with cerebral palsy,spastic quadriparesis,severe kyphoscoliosis and interposed organs and who required enteral nutrition(EN)due to starvation was performed.For all patients,standard PEG placement was impossible due to distorted anatomy.All the patients qualified for the laparoscopyassisted PEG procedure.RESULTS:In all twelve patients,the laparoscopy-assisted PEG was successful,and EN was introduced four to six hours after the PEG placement.There were no complications in the perioperative period,either technical or metabolic.All the patients were discharged from the hospital and were then effectively fed using bolus methods.CONCLUSION:Laparoscopy-assisted PEG should become the method of choice for gastrostomy tube placement and subsequent EN if PEG placement cannot be performed safely.

Femtosecond laser additive and subtractive micro-processing:enabling a high-channeldensity silica interposer for multicore fibre to silicon-photonic packaging

Great strides have been made over the past decade to establish femtosecond lasers in advanced manufacturing systems for enabling new forms of non-contact processing of transparent materials.Research advances have shown that a myriad of additive and subtractive techniques is now possible for flexible 2D and 3D structuring of such materials with micro-and nano-scale precision.In this paper,these techniques have been refined and scaled up to demonstrate the potential for 3D writing of high-density optical packaging components,specifically addressing the major bottleneck for efficiently connecting optical fibres to silicon photonic(SiP)processors for use in telecom and data centres.An 84-channel fused silica interposer was introduced for high-density edge coupling of multicore fibres(MCFs)to a SiP chip.Femtosecond laser irradiation followed by chemical etching was further harnessed to open alignment sockets,permitting rapid assembly with precise locking of MCF positions for efficient coupling to laser written optical waveguides in the interposer.A 3D waveguide fanout design provided an attractive balancing of low losses,modematching,high channel density,compact footprint,and low crosstalk.The 3D additive and subtractive processes thus demonstrated the potential for higher scale integration and rapid photonic assembly and packaging of micro-optic components for telecom interconnects,with possible broader applications in integrated biophotonic chips or micro-displays.

微系统Interposer测试技术与发展趋势

随着微系统技术向三维立体集成不断发展,Interposer技术逐渐成为关注的焦点,是未来电子系统小型化和多功能化的重要技术途径,具有广阔的应用市场和发展前景。关于Interposer的测试技术研究也提上发展日程。对目前Interposer测试技术的研究现状和发展趋势进行了综述,重点总结了研究机构在Interposer测试技术领域的研究现状,并对技术发展趋势做了简单展望。

Amkor的2.5D和HDFO封装-先进异构芯片封装解决方案

科技的大浪潮,正向人工智能、深度学习、云端计算、超级电脑等领域快速发展,而这些前沿技术都有一个共同特点,那就是超高性能的高速芯片(IC)。除了主芯片自身往更先进的工艺节点推进外,还可能与更高带宽的内存(High Bandwidth Memory,HBM),或更高传输速度的串行解串器(Serdes),或其它特定功能的芯片,整合成异构芯片封装(Heterogeneous Package),将整体效能推向极致。为了实现这样的功能,异构芯片集成的封装技术将扮演至关重要的角色。本文介绍由Amkor开发的封装技术平台,包括2.5D硅通孔(TSV)介质层(Interposer)、基板上芯片(CoS)、晶圆上芯片(CoW)、高密度扇出型封装(HDFO),以及电子设计自动化(EDA)设计流程和测试解决方案。为了达到大规模生产此类先进封装的能力,文章还将介绍最先进的高洁净度高自动化封装工厂K5,以高技术和高质量帮助客户实现其高速性能的目标。

基于2.5D封装设计对SI性能影响的研究

随着AI、5G、超大规模存储的云服务,高性能显卡以及高端服务器的应用,传统2D封装技术已经不能满足相关设计与性能需求,在市场需求驱动下2.5D封装技术解决方案在满足产品对高带宽、低功耗、高集成度的需求方面的优势得到凸显与认可,尤其在高端HBM显卡方面的应用。由于2.5D封装技术的工艺复杂,数据量以及仿真建模难度比较大,导致芯片的封装设计与加工成本相比于传统2D芯片会高很多,因此目前绝大部分的2.5D封装技术都只能在高端芯片领域使用[2]。伴随着越来越多的芯片设计公司加入到2.5D封装设计的浪潮中,工艺迭代加速使得工艺成熟度越来越高,成本也在逐步降低,相信随着工艺技术的进一步成熟与完善,2.5D设计技术将会迎来快速增长。本文主要针对2.5D封装工艺对封装系统SI性能进行仿真和评估,制定相关设计规范,为封装设计提供参考与指导。

Electroacupuncture preconditioning alleviates myocardial ischemia-reperfusion injury through the hypothalamic paraventricular nucleus-interposed nucleus nerve pathway

OBJECTIVE:To explore whether the paraventricular nucleus(PVN)participates in regulation of the antimyocardial ischemia-reperfusion injury(MIRI)effect of electroacupuncture(EA)and whether this is achieved through the PVN-interposed nucleus(IN)neural pathway.METHODS:The modeling method of myocardial ischemia reperfusion injury was achieved by ligating the left anterior descending coronary artery in SpragueDawley rats.We used the Powerlab multi-channel physiological recorder system to record electrocardiograms and analyze the changes in ST segment displacement;2,3,5-Triphenyltetrazolium chloride staining was used to observe the percentage of myocardial infarction areas.Detecting cardiac troponin I(cTnI),lactate dehydrogenase(LDH)in serum was done with an enzyme-linked immunosorbent assay kit.Morphological changes in the myocardium were detected in each group with hematoxylin-eosin staining of paraffin sections.Detection of c-fos protein expression in the PVN of the hypothalamus was done with the immuneofluorescence method.The Plexon multi-channel acquisition system recorded PVN neuron discharges and local field potentials in each group of rats.Offline Sorter software was used for cluster analysis.Neuro Explorer software was used to perform autocorrelation,raster and frequency characteristics and spectral energy analysis of neuron signals in each group.RESULTS:Compared with the MIRI model group,the areas of myocardial infarction in the EA group were significantly reduced;the expression of cTnI,LDH in serum was decreased significantly.The firing frequency of pyramidal cells in the PVN was significantly increased and the spectrum energy map showed energy was reduced,c-fos expression in PVN was reduced,this indicated that neuronal activity in the PVN participates in the effect of EA improving myocardial injury.In addition,we used the kainic acid method to lesion the IN and observed that the effect of EA was weakened.For example,the area of myocardial infarction of lesion IN+EA group in rats was significantly increased compared with that resulting from EA group,the expression of cTnI,LDH in serum was significantly increased,the firing frequency of pyramidal cells in the PVN was significantly reduced.A spectral energy diagram shows that the energy after damage was higher than that of EA group.At the same time,the expression of c-fos in the PVN increased again.CONCLUSION:Our results indicated that the PVN-IN nerve pathway may participate as an effective pathway of EA to improve the effect of myocardial injury.

Three-Dimensional Heterogeneity of Cerebellar Interposed Nucleus-Recipient Zones in the Thalamic Nuclei

The cerebellum is conceptualized as a processor of complex movements and is also endowed with roles in cognitive and emotional behaviors.Although the axons of deep cerebellar nuclei are known to project to primary thalamic nuclei,macroscopic investigation of the characteristics of these projections,such as the spatial distribution of recipient zones,is lacking.Here,we studied the output of the cerebellar interposed nucleus(IpN)to the ventrolateral(VL)and centrolateral(CL)thalamic nuclei using electrophysiological recording in vivo and trans-synaptic viral tracing.We found that IpN stimulation induced mono-synaptic evoked potentials(EPs)in the VL but not the CL region.Furthermore,both the EPs induced by the IpN and the innervation of IpN projections displayed substantial heterogeneity across the VL region in three-dimensional space.These findings indicate that the recipient zones of IpN inputs vary between and within thalamic nuclei and may differentially control thalamo-cortical networks.

Inkjet printing technology for increasing the I/O density of 3D TSV interposers

Interposers with through-silicon vias(TSVs)play a key role in the three-dimensional integration and packaging of integrated circuits and microelectromechanical systems.In the current practice of fabricating interposers,solder balls are placed next to the vias;however,this approach requires a large foot print for the input/output(I/O)connections.Therefore,in this study,we investigate the possibility of placing the solder balls directly on top of the vias,thereby enabling a smaller pitch between the solder balls and an increased density of the I/O connections.To reach this goal,inkjet printing(that is,piezo and super inkjet)was used to successfully fill and planarize hollow metal TSVs with a dielectric polymer.The under bump metallization(UBM)pads were also successfully printed with inkjet technology on top of the polymer-filled vias,using either Ag or Au inks.The reliability of the TSV interposers was investigated by a temperature cycling stress test(−40℃ to+125℃).The stress test showed no impact on DC resistance of the TSVs;however,shrinkage and delamination of the polymer was observed,along with some micro-cracks in the UBM pads.For proof of concept,SnAgCu-based solder balls were jetted on the UBM pads.

TXV Technology:The cornerstone of 3D system-in-packaging

System-in-packaging(Si P) can realize the integration and miniaturization of electronic devices and it is significant to continue Moore’s law.Through-X-via(TXV) technology is the cornerstone of 3 D-SiP,which enables the vertical stacking and electrical interconnection of electronic devices.TXV originated from through-hole(TH) in PCB substrates and evolved in different substrate materials,such as silicon,glass,ceramic,and polymer.This work provides a comprehensive review of four distinguishing TXV technologies(through silicon via(TSV),through glass via(TGV),through ceramic via(TCV),and through mold via(TMV)),including the fabrication mechanisms,processes,and applications.Every TXV technology has unique characteristics and owns particular processes and functions.The process methods,key technologies,application fields,and advantages and disadvantages of each TXV technology were discussed.The cutting-edge through-hole process and development direction were reviewed.

Design of a 3D Wilkinson power divider using through glass via technology

Due to its low electrical loss and low process cost, a glass interposer has been developed to provide a compelling alternative to the silicon-based interposer for packaging of future 2-D and 3-D ICs. In this study,through glass vias(TGVs) are used to implement 3-D inductors for minimal footprint and large quality factor. Using the inductors and parallel plate capacitors, a compact 3-D Wilkinson power divider is designed and analyzed.Compared with some reported power dividers, the proposed TGV-based circuit has an ultra-compact size and excellent electrical performance.

Design,analysis and test of high-frequency interconnections in 2.5D package with silicon interposer

An interposer test vehicle with TSVs（through-silicon vias） and two redistribute layers（RDLs） on the top side for 2.5D integration was fabricated and high-frequency interconnections were designed in the form of coplanar waveguide（CPW） and micro strip line（MSL） structures. The signal transmission structures were modeled and simulated in a 3D EM tool to estimate the S-parameters. The measurements were carried out using the vector network analyzer（VNA）. The simulated results of the transmission lines on the surface of the interposer without TSVs showed good agreement with the simulated results, while the transmission structures with TSVs showed significant offset between simulation and test results. The parameters of the transmission structures were changed,and the results were also presented and discussed in this paper.

Development of a BGA Package Based on Si Interposer with Through Silicon Via

A ball grid array （BGA） package based on Si interposer with through silicon via （TSV） was de- signed. Thermal behaviors of the designed BGA with Si interposer has been analyzed and compared to a conventional BGA with BT substrate in the approach of finite element modeling （FEM）. The Si interposer with TSV was then fabricated and the designed BGA package was demonstrated. The designed BGA pack- age includes a 100 ~m thick Si interposer, which has redistribution copper traces on both sides. Through vias with 25 to 40 ~m diameter were fabricated on the Si interposer using deep reactive ion etching （DRIE）, plasma enhanced chemical vapor deposition （PECVD）, copper electroplating and chemical mechanical pol- ishing （CMP）, etc. TSV in the designed interposer is used as electrical interconnections and cooling chan- nels. 5 mm by 5 mm and 10 mm by 10 mm thermal chips were assembled on the Si interposer.