针对调试的可移植性,建立同流水相关的精确调试异常模型,模型通过增加调试中断、单步、软硬件断点等精确调试异常的产生和处理机制、片外调试存储空间以及基于JTAG(joint test action group)的快速通信协议,实现一种通过JTAG接口的嵌入...针对调试的可移植性,建立同流水相关的精确调试异常模型,模型通过增加调试中断、单步、软硬件断点等精确调试异常的产生和处理机制、片外调试存储空间以及基于JTAG(joint test action group)的快速通信协议,实现一种通过JTAG接口的嵌入式处理器核的片上调试方案.该调试模型在嵌入式处理器RISC32E核的应用实现表明,它具有良好的可观察性和可控制性,并且该模型的应用不局限于六级流水结构的微处理器,还可以方便地推广到其他流水结构的微处理器.对比调试过程中的一些基本调试操作开销,该调试方案具有较高的调试效率.展开更多
基于FT2232HL芯片和通用串行总线(Universal Serial Bus,USB)HUB技术,提供了一种用于多个电子模块同时在线调试的解决方案.利用高速双端口桥接芯片FT2232HL进行USB接口和联合测试行动小组(Joint Test Action Group,JTAG)的协议转换,同...基于FT2232HL芯片和通用串行总线(Universal Serial Bus,USB)HUB技术,提供了一种用于多个电子模块同时在线调试的解决方案.利用高速双端口桥接芯片FT2232HL进行USB接口和联合测试行动小组(Joint Test Action Group,JTAG)的协议转换,同时采用USB集线器控制芯片TUSB2046将一路USB接口分为多路.在后续软件调试过程中,可以通过一个USB端口访问多个处理器的JTAG接口和串口,实现多个处理模块或电子模块的在线调试功能.对该方案的相关原理和关键技术进行了描述,以TMS570LS3137处理器为例,设计了一个用于4个模块在线调试的调试系统,通过实验对该方案进行了验证.展开更多
An on-chip debug circuit based on Joint Test Action Group(JTAG)interface for L-digital signal processor(L-DSP)is proposed,which has debug functions such as storage resource access,central processing unit(CPU)pipeline ...An on-chip debug circuit based on Joint Test Action Group(JTAG)interface for L-digital signal processor(L-DSP)is proposed,which has debug functions such as storage resource access,central processing unit(CPU)pipeline control,hardware breakpoint/observation point,and parameter statistics.Compared with traditional debug mode,the proposed debug circuit completes direct transmission of data between peripherals and memory by adding data test-direct memory access(DT-DMA)module,which improves debug efficiency greatly.The proposed circuit was designed in a 0.18μm complementary metal-oxide-semiconductor(CMOS)process with an area of 167234.76μm~2 and a power consumption of 8.89 mW.And the proposed debug circuit and L-DSP were verified under a field programmable gate array(FPGA).Experimental results show that the proposed circuit has complete debug functions and the rate of DT-DMA for transferring debug data is three times faster than the CPU.展开更多
文摘针对调试的可移植性,建立同流水相关的精确调试异常模型,模型通过增加调试中断、单步、软硬件断点等精确调试异常的产生和处理机制、片外调试存储空间以及基于JTAG(joint test action group)的快速通信协议,实现一种通过JTAG接口的嵌入式处理器核的片上调试方案.该调试模型在嵌入式处理器RISC32E核的应用实现表明,它具有良好的可观察性和可控制性,并且该模型的应用不局限于六级流水结构的微处理器,还可以方便地推广到其他流水结构的微处理器.对比调试过程中的一些基本调试操作开销,该调试方案具有较高的调试效率.
文摘基于FT2232HL芯片和通用串行总线(Universal Serial Bus,USB)HUB技术,提供了一种用于多个电子模块同时在线调试的解决方案.利用高速双端口桥接芯片FT2232HL进行USB接口和联合测试行动小组(Joint Test Action Group,JTAG)的协议转换,同时采用USB集线器控制芯片TUSB2046将一路USB接口分为多路.在后续软件调试过程中,可以通过一个USB端口访问多个处理器的JTAG接口和串口,实现多个处理模块或电子模块的在线调试功能.对该方案的相关原理和关键技术进行了描述,以TMS570LS3137处理器为例,设计了一个用于4个模块在线调试的调试系统,通过实验对该方案进行了验证.
基金supported by the China-Montenegro 3rd Science&Technology Exchange and Cooperation Project(3-7)the Open Research Fund of Hunan Provincial Key Laboratory of Flexible Electronic Materials Genome Engineering(202005)the Double First-Class Scientific Research International Cooperation Expansion Project of Changsha University of Science&Technology(2019ic18)。
文摘An on-chip debug circuit based on Joint Test Action Group(JTAG)interface for L-digital signal processor(L-DSP)is proposed,which has debug functions such as storage resource access,central processing unit(CPU)pipeline control,hardware breakpoint/observation point,and parameter statistics.Compared with traditional debug mode,the proposed debug circuit completes direct transmission of data between peripherals and memory by adding data test-direct memory access(DT-DMA)module,which improves debug efficiency greatly.The proposed circuit was designed in a 0.18μm complementary metal-oxide-semiconductor(CMOS)process with an area of 167234.76μm~2 and a power consumption of 8.89 mW.And the proposed debug circuit and L-DSP were verified under a field programmable gate array(FPGA).Experimental results show that the proposed circuit has complete debug functions and the rate of DT-DMA for transferring debug data is three times faster than the CPU.
