A novel low specific on-resistance （Ron,sp） lateral double-diffused metal oxide semiconductor （LDMOS） with a buried improved super-junction （BISJ） layer is proposed. A super-junction layer is buried in the drift...A novel low specific on-resistance （Ron,sp） lateral double-diffused metal oxide semiconductor （LDMOS） with a buried improved super-junction （BISJ） layer is proposed. A super-junction layer is buried in the drift region and the P pillar is split into two parts with different doping concentrations. Firstly, the buried super-junction layer causes the multiple-direction assisted depletion effect. The drift region doping concentration of the BISJ LDMOS is therefore much higher than that of the conventional LDMOS. Secondly, the buried super-junction layer provides a bulk low on-resistance path. Both of them reduce Ron,sp greatly. Thirdly, the electric field modulation effect of the new electric field peak introduced by the step doped P pillar improves the breakdown voltage （BV）. The BISJ LDMOS exhibits a BV of 300 V and Ron,sp of 8.08 mΩ·cm2 which increases BV by 35% and reduces Ron,sp by 60% compared with those of a conventional LDMOS with a drift length of 15 μm, respectively.展开更多
A novel super-junction lateral double-diffused metal-oxide semiconductor （SJ-LDMOS） with a partial lightly doped P pillar （PD） is proposed. Firstly, the reduction in the partial P pillar charges ensures the charge...A novel super-junction lateral double-diffused metal-oxide semiconductor （SJ-LDMOS） with a partial lightly doped P pillar （PD） is proposed. Firstly, the reduction in the partial P pillar charges ensures the charge balance and suppresses the substrate-assisted depletion effect. Secondly, the new electric field peak produced by the P/P junction modulates the surface electric field distribution. Both of these result in a high breakdown voltage （BV）. In addition, due to the same conduction paths, the specific on-resistance （Ron,sp） of the PD SJ-LDMOS is approximately identical to the conventional SJ-LDMOS. Simulation results indicate that the average value of the surface lateral electric field of the PD SJ-LDMOS reaches 20 V/μm at a 15 μm drift length, resulting in a BV of 300 V.展开更多
A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS pro...A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches(SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance(Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage(BV). Compared to a conventional LDMOS(C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 m?·cm^2 to 23.24 m?·cm^2 and the Baliga's figure of merit(FOM) of is 9.07 MW/cm^2.展开更多
A low gate voltage operated multi-emitter-dot gated lateral bipolar junction transistor （BJT） ion sensor is proposed. The proposed device is composed of an arrayed gated lateral BJT, which is driven in the metal-oxi...A low gate voltage operated multi-emitter-dot gated lateral bipolar junction transistor （BJT） ion sensor is proposed. The proposed device is composed of an arrayed gated lateral BJT, which is driven in the metal-oxidesemiconductor field-effect transistor （MOSFET）-BJT hybrid operation mode. Further, it has multiple emitter dots linked to each other in parallel to improve ionic sensitivity. Using hydrogen ionic solutions as reference solutions, we conduct experiments in which we compare the sensitivity and threshold voltage of the multi-emitter-dot gated lateral BJT with that of the single-emitter-dot gated lateral BJT. The multi-emitter-dot gated lateral BJT not only shows increased sensitivity but, more importantly, the proposed device can be operated under very low gate voltage, whereas the conventional ion-sensitive field-effect transistors cannot. This special characteristic is significant for low power devices and for function devices in which the provision of a gate voltage is difficult.展开更多
A novel substrate current model is proposed for submicron and deep-submicron li ghtly-doped-drain (LDD) n-MOSFET,with the emphasis on accurate description of the characteristics length by taking the effects of channe...A novel substrate current model is proposed for submicron and deep-submicron li ghtly-doped-drain (LDD) n-MOSFET,with the emphasis on accurate description of the characteristics length by taking the effects of channel length and bias int o account.This is due to that the characteristics lenth significantly affects th e maximum lateral electric field and the length of velocity saturation region,bo th of which are very important in modeling the drain current and the substrate c urrent.The comparison between simulations and experiments shows a good predictio n of the model for submicron and deep-submicron LDD MOSFET.Moreover,the analyti cal model is suitable for descgn of devices as it is low in computation consumpt ion.展开更多
A novel terminal-optimized triple RESURF LDMOS(TOTR-LDMOS) is proposed and verified in a 0.25-μm bipolarCMOS-DMOS(BCD) process. By introducing a low concentration region to the terminal region, the surface electric f...A novel terminal-optimized triple RESURF LDMOS(TOTR-LDMOS) is proposed and verified in a 0.25-μm bipolarCMOS-DMOS(BCD) process. By introducing a low concentration region to the terminal region, the surface electric field of the TOTR-LDMOS decreases, helping to improve the breakdown voltage(BV) and electrostatic discharge(ESD) robustness. Both traditional LDMOS and TOTR-LDMOS are fabricated and investigated by transmission line pulse(TLP) tests,direct current(DC) tests, and TCAD simulations. The results show that comparing with the traditional LDMOS, the BV of the TOTR-LDMOS increases from 755 V to 817 V without affecting the specific on-resistance(R_(on,sp)) of 6.99Ω·mm^(2).Meanwhile, the ESD robustness of the TOTR-LDMOS increases by 147%. The TOTR-LDMOS exhibits an excellent performance among the present 700-V LDMOS devices.展开更多
A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator （SOI） trench lateral double-diffused metal-oxide-semiconductor （LDMOS） is presented. Based on t...A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator （SOI） trench lateral double-diffused metal-oxide-semiconductor （LDMOS） is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.展开更多
基金Project supported by the National Science and Technology Project of the Ministry of Science and Technology of China(Grant No.2010ZX02201)the National Natural Science Foundation of China(Grant No.61176069)the National Defense Pre-Research of China(Grant No.51308020304)
文摘A novel low specific on-resistance （Ron,sp） lateral double-diffused metal oxide semiconductor （LDMOS） with a buried improved super-junction （BISJ） layer is proposed. A super-junction layer is buried in the drift region and the P pillar is split into two parts with different doping concentrations. Firstly, the buried super-junction layer causes the multiple-direction assisted depletion effect. The drift region doping concentration of the BISJ LDMOS is therefore much higher than that of the conventional LDMOS. Secondly, the buried super-junction layer provides a bulk low on-resistance path. Both of them reduce Ron,sp greatly. Thirdly, the electric field modulation effect of the new electric field peak introduced by the step doped P pillar improves the breakdown voltage （BV）. The BISJ LDMOS exhibits a BV of 300 V and Ron,sp of 8.08 mΩ·cm2 which increases BV by 35% and reduces Ron,sp by 60% compared with those of a conventional LDMOS with a drift length of 15 μm, respectively.
基金supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. 2010ZX02201)the National Natural Science Foundation of China (Grant No. 61176069)the National Defense Pre-Research of China (Grant No. 51308020304)
文摘A novel super-junction lateral double-diffused metal-oxide semiconductor （SJ-LDMOS） with a partial lightly doped P pillar （PD） is proposed. Firstly, the reduction in the partial P pillar charges ensures the charge balance and suppresses the substrate-assisted depletion effect. Secondly, the new electric field peak produced by the P/P junction modulates the surface electric field distribution. Both of these result in a high breakdown voltage （BV）. In addition, due to the same conduction paths, the specific on-resistance （Ron,sp） of the PD SJ-LDMOS is approximately identical to the conventional SJ-LDMOS. Simulation results indicate that the average value of the surface lateral electric field of the PD SJ-LDMOS reaches 20 V/μm at a 15 μm drift length, resulting in a BV of 300 V.
基金supported by the National Natural Science Foundation of China(Grant No.61464003)the Guangxi Natural Science Foundation,China(Grant Nos.2015GXNSFAA139300 and 2018JJA170010)
文摘A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches(SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance(Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage(BV). Compared to a conventional LDMOS(C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 m?·cm^2 to 23.24 m?·cm^2 and the Baliga's figure of merit(FOM) of is 9.07 MW/cm^2.
基金Supported by the National Natural Science Foundation of China under Grant No 61403014
文摘A low gate voltage operated multi-emitter-dot gated lateral bipolar junction transistor （BJT） ion sensor is proposed. The proposed device is composed of an arrayed gated lateral BJT, which is driven in the metal-oxidesemiconductor field-effect transistor （MOSFET）-BJT hybrid operation mode. Further, it has multiple emitter dots linked to each other in parallel to improve ionic sensitivity. Using hydrogen ionic solutions as reference solutions, we conduct experiments in which we compare the sensitivity and threshold voltage of the multi-emitter-dot gated lateral BJT with that of the single-emitter-dot gated lateral BJT. The multi-emitter-dot gated lateral BJT not only shows increased sensitivity but, more importantly, the proposed device can be operated under very low gate voltage, whereas the conventional ion-sensitive field-effect transistors cannot. This special characteristic is significant for low power devices and for function devices in which the provision of a gate voltage is difficult.
文摘A novel substrate current model is proposed for submicron and deep-submicron li ghtly-doped-drain (LDD) n-MOSFET,with the emphasis on accurate description of the characteristics length by taking the effects of channel length and bias int o account.This is due to that the characteristics lenth significantly affects th e maximum lateral electric field and the length of velocity saturation region,bo th of which are very important in modeling the drain current and the substrate c urrent.The comparison between simulations and experiments shows a good predictio n of the model for submicron and deep-submicron LDD MOSFET.Moreover,the analyti cal model is suitable for descgn of devices as it is low in computation consumpt ion.
基金supported by the National Natural Science Foundation of China (Grant No. 61504049)the China Postdoctoral Science Foundation (Grant No. 2016M600361)the Fundamental Research Funds for the Central Universities,China (Grant No. JUSRP51510)。
文摘A novel terminal-optimized triple RESURF LDMOS(TOTR-LDMOS) is proposed and verified in a 0.25-μm bipolarCMOS-DMOS(BCD) process. By introducing a low concentration region to the terminal region, the surface electric field of the TOTR-LDMOS decreases, helping to improve the breakdown voltage(BV) and electrostatic discharge(ESD) robustness. Both traditional LDMOS and TOTR-LDMOS are fabricated and investigated by transmission line pulse(TLP) tests,direct current(DC) tests, and TCAD simulations. The results show that comparing with the traditional LDMOS, the BV of the TOTR-LDMOS increases from 755 V to 817 V without affecting the specific on-resistance(R_(on,sp)) of 6.99Ω·mm^(2).Meanwhile, the ESD robustness of the TOTR-LDMOS increases by 147%. The TOTR-LDMOS exhibits an excellent performance among the present 700-V LDMOS devices.
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 61176069 and 60976060)the National Key Laboratory of Analogue Integrated Circuit, China (Grant No. 9140C090304110C0905)
文摘A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator （SOI） trench lateral double-diffused metal-oxide-semiconductor （LDMOS） is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.
