A new real and complex-valued hybrid time-delay neural network(TDNN)is proposed for modeling and linearizing the broad-band power amplifier(BPA).The neural network includes the generalized memory effect of input signa...A new real and complex-valued hybrid time-delay neural network(TDNN)is proposed for modeling and linearizing the broad-band power amplifier(BPA).The neural network includes the generalized memory effect of input signals,complex-valued input signals and the fractional order of a complex-valued input signal module,and,thus,the modeling accuracy is improved significantly.A comparative study of the normalized mean square error(NMSE)of the real and complex-valued hybrid TDNN for different spread constants,memory depths,node numbers,and order numbers is studied so as to establish an optimal TDNN as an effective baseband model,suitable for modeling strong nonlinearity of the BPA.A 51-dBm BPA with a 25-MHz bandwidth mixed test signal is used to verify the effectiveness of the proposed model.Compared with the memory polynomial(MP)model and the real-valued TDNN,the real and complex-valued hybrid TDNN is highly effective,leading to an improvement of 5 dB in the NMSE.In addition,the real and complex-valued hybrid TDNN has an improvement of 0.6 dB over the generalized MP model in the NMSE.Also,it has better numerical stability.Moreover,the proposed TDNN presents a significant improvement over the real-valued TDNN and the MP models in suppressing out-of-band spectral regrowth.展开更多
An asymmetric Doherty architecture based on three identical transistors is proposed in this paper. This proposed three.way topology reduces the difficulty in designing matching networks brought by the low optimal impe...An asymmetric Doherty architecture based on three identical transistors is proposed in this paper. This proposed three.way topology reduces the difficulty in designing matching networks brought by the low optimal impedance of high power transistors. And the inverted Doherty topology as well as carefully chosen value of load impedance makes it possible to extend the bandwidth of high power amplifiers. Besides, bias networks of this proposed three.way architecture are also carefully considered to improve the linearity. The proposed high power three.way Doherty power amplifier(3W.DPA) is designed and fabricated based on theoretic analysis. Its maximum output power is about 600 Watts and the drain efficiency is above 35.5% at 9d B back off output power level from 1.9GHz to 2.2 GHz and the saturated drain efficiency is above 47% across the whole frequency band. The measured concurrent two.tone results suggest that the linearity of DPA is improved by at least 5d B.展开更多
Most satellite digital radio （SDR） systems use orthogonal frequency-division multiplexing （OFDM） transmission, which means that variable envelope signals are distorted by the RF power amplifier （PA）. It is custo...Most satellite digital radio （SDR） systems use orthogonal frequency-division multiplexing （OFDM） transmission, which means that variable envelope signals are distorted by the RF power amplifier （PA）. It is customary to back off the input power to the PA to avoid the PA nonlinear region of operation. In this way, linearity can be achieved at the cost of power efficiency. Another attractive option is to use a linearizer, which compensates for the nonlinear effects of the PA. In this paper, an OFDM transmitter conforming to European Telecommunications Standard Institute SDR Technical Specifications 2007-2008 was designed and implemented on a low-cost field-programmable gate array （FPGA） platform. A weakly nonlinear PA, operating in the L-band SDR frequency, was used for signal transmission. An adaptive linearizer was designed and implemented on the same FPGA device using digital predistortion to correct the undesired effects of the PA on the transmitted signal. Test results show that spectral distortion can be suppressed between 6-9 dB using the designed linearizer when the PA is driven close to its saturation region.展开更多
This paper proposes that a radio frequency power amplifier is suitable for a 5G millimeter wave.It adopts a three-stage single-ended structure at 28GHz.An analog predistortion lmearization method is used to improve th...This paper proposes that a radio frequency power amplifier is suitable for a 5G millimeter wave.It adopts a three-stage single-ended structure at 28GHz.An analog predistortion lmearization method is used to improve the linearity of the power amplifier(PA).As a result,there is a significant improvement in power-added efficiency(PAE)and linearity is achieved.The Ka-band PA is implemented in TSMC 65nm CMOS process.At 1.2V supply voltage,the PA proposed in this paper achieves a saturated output power of 15.9dBm and a PAE of 16%.After linearization,the output power at the ldB compression point is increased by 2dBm,with efficient gain compensation performance.展开更多
A digital predistorted class-F power amplifier （PA） using Cree GaN HEMT CGH40010 operating at 2. 12 GHz is presented to obtain high efficiency and excellent linearity for wideband code-division multiple access （ WC...A digital predistorted class-F power amplifier （PA） using Cree GaN HEMT CGH40010 operating at 2. 12 GHz is presented to obtain high efficiency and excellent linearity for wideband code-division multiple access （ WCDMA ） applications. Measurement results with the continuous wave （CW） signals indicate that the designed class-F PA achieves a peak power-added efficiency （PAE） of 75. 2% with an output power of 39.4 dBm. The adjacent channel power ratio （ACPR） of the designed PA after digital predistortion （DPD） decreases from -28. 3 and -27. 5 dBc to -51.9 and -54. 0 dBc, respectively, for a 4-carrier 20 MHz WCDMA signal with 7. 1 dB peak to average power ratio （PAPR）. The drain efficiency （DE） of the PA is 37. 8% at an average output power of 33. 3 dBm. The designed power amplifier can be aoolied in the WCDMA system.展开更多
A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control ...A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.展开更多
A power amplifier’s linearity determines the emission signal’s quality and the efficiency of the system.Nonlinear distortion can result in system bit error,out-of-band radiation,and interference with other channels,...A power amplifier’s linearity determines the emission signal’s quality and the efficiency of the system.Nonlinear distortion can result in system bit error,out-of-band radiation,and interference with other channels,which severely influence communication system’s quality and reliability.Starting from the third-order intermodulation point of the milimeter wave(mm-Wave)power amplifiers,the circuit’s nonlinearity is compensated for.The analysis,design,and implementation of linear class AB mm-Wave power amplifiers based on GlobalFoundries 45 nm CMOS silicon-on-insulator(SOI)technology are presented.Three single-ended and differential stacked power amplifiers have been implemented based on cascode cells and triple cascode cells operating in U-band frequencies.According to nonlinear analysis and on-wafer measurements,designs based on triple cascode cells outperform those based on cascode cells.Using single-ended measurements,the differential power amplifier achieves a measured peak power-added efficiency(PAE)of 47.2%and a saturated output power(P_(sat))of 25.2 dBm at 44 GHz.The amplifier achieves a P_(sat)higher than 23 dBm and a maximum PAE higher than 25%in the measured bandwidth from 44 GHz to 50 GHz.展开更多
本文基于功率MOSFET设计高频宽带线性功率放大器单片集成电路,主要针对功率放大器自身功耗和因高频下电路容性负载引起的信号相移及与此有关的功率放大器的效率问题.特别是选用高频功率MOSFET器件,通过电路优化设计使功放的转换速率达...本文基于功率MOSFET设计高频宽带线性功率放大器单片集成电路,主要针对功率放大器自身功耗和因高频下电路容性负载引起的信号相移及与此有关的功率放大器的效率问题.特别是选用高频功率MOSFET器件,通过电路优化设计使功放的转换速率达到最大,频带宽度达5-135 MHZ,在60 MHZ频率下,放大器的线性度为1 d B增益压缩点,在20-110 MHZ频率范围内,输入功率12 d B时,放大器的平均和最大增益分别为51.8 d B和53.5 d B,放大器的增益稳定性测试表明,频率60 MHZ,输入功率6 d B时,放大器的增益在24 d B-29 d B区间内波动.展开更多
A kind of drive circuit which high-power output for stepping motor, based two-phase hybrid stepping motor are designed, achieved. is low power consumption, high-performance and on BY-5064, and a kind of dedicated circ...A kind of drive circuit which high-power output for stepping motor, based two-phase hybrid stepping motor are designed, achieved. is low power consumption, high-performance and on BY-5064, and a kind of dedicated circuit for drive control for stepping motor with high-power is展开更多
In this paper, a reduced-cost method of measuring residual nonlinearities in an adaptive digitally predistorted amplifier is proposed. Measurements obtained by selective sampling of the amplifier output are integrated...In this paper, a reduced-cost method of measuring residual nonlinearities in an adaptive digitally predistorted amplifier is proposed. Measurements obtained by selective sampling of the amplifier output are integrated over the input envelope range to adapt a fourth-order polynomial predistorter with memory correction. Results for a WCDMA input with a 101 carrier configuration show that a transmitter using the proposed method can meet the adjacent channel leakage ratio （ACLR） specification. Inverse modeling of the nonlinearity is proposed as a future extension that will reduce the cost of the system further.展开更多
基金The National Natural Science Foundation of China(No.61561052,61701262)the Science and Technology Foundation of Henan Province(No.182102410062,182102210114)the Science and Technology Foundation of Henan Educational Committee(No.17A510018)
文摘A new real and complex-valued hybrid time-delay neural network(TDNN)is proposed for modeling and linearizing the broad-band power amplifier(BPA).The neural network includes the generalized memory effect of input signals,complex-valued input signals and the fractional order of a complex-valued input signal module,and,thus,the modeling accuracy is improved significantly.A comparative study of the normalized mean square error(NMSE)of the real and complex-valued hybrid TDNN for different spread constants,memory depths,node numbers,and order numbers is studied so as to establish an optimal TDNN as an effective baseband model,suitable for modeling strong nonlinearity of the BPA.A 51-dBm BPA with a 25-MHz bandwidth mixed test signal is used to verify the effectiveness of the proposed model.Compared with the memory polynomial(MP)model and the real-valued TDNN,the real and complex-valued hybrid TDNN is highly effective,leading to an improvement of 5 dB in the NMSE.In addition,the real and complex-valued hybrid TDNN has an improvement of 0.6 dB over the generalized MP model in the NMSE.Also,it has better numerical stability.Moreover,the proposed TDNN presents a significant improvement over the real-valued TDNN and the MP models in suppressing out-of-band spectral regrowth.
基金supported in part by the National Basic Research Program of China (Grant No. 2014CB339900)the National Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. Grant 2015ZX03002002 and Grant 2016ZX03002009, and Grant 2016ZX03001005)+2 种基金the 863 program (Grant No. 2015AA010802)the National Natural Science Foundation of China (Grant No. 61522112, 61331003)the New Century Excellent Talents in University (NCET)
文摘An asymmetric Doherty architecture based on three identical transistors is proposed in this paper. This proposed three.way topology reduces the difficulty in designing matching networks brought by the low optimal impedance of high power transistors. And the inverted Doherty topology as well as carefully chosen value of load impedance makes it possible to extend the bandwidth of high power amplifiers. Besides, bias networks of this proposed three.way architecture are also carefully considered to improve the linearity. The proposed high power three.way Doherty power amplifier(3W.DPA) is designed and fabricated based on theoretic analysis. Its maximum output power is about 600 Watts and the drain efficiency is above 35.5% at 9d B back off output power level from 1.9GHz to 2.2 GHz and the saturated drain efficiency is above 47% across the whole frequency band. The measured concurrent two.tone results suggest that the linearity of DPA is improved by at least 5d B.
文摘Most satellite digital radio （SDR） systems use orthogonal frequency-division multiplexing （OFDM） transmission, which means that variable envelope signals are distorted by the RF power amplifier （PA）. It is customary to back off the input power to the PA to avoid the PA nonlinear region of operation. In this way, linearity can be achieved at the cost of power efficiency. Another attractive option is to use a linearizer, which compensates for the nonlinear effects of the PA. In this paper, an OFDM transmitter conforming to European Telecommunications Standard Institute SDR Technical Specifications 2007-2008 was designed and implemented on a low-cost field-programmable gate array （FPGA） platform. A weakly nonlinear PA, operating in the L-band SDR frequency, was used for signal transmission. An adaptive linearizer was designed and implemented on the same FPGA device using digital predistortion to correct the undesired effects of the PA on the transmitted signal. Test results show that spectral distortion can be suppressed between 6-9 dB using the designed linearizer when the PA is driven close to its saturation region.
文摘This paper proposes that a radio frequency power amplifier is suitable for a 5G millimeter wave.It adopts a three-stage single-ended structure at 28GHz.An analog predistortion lmearization method is used to improve the linearity of the power amplifier(PA).As a result,there is a significant improvement in power-added efficiency(PAE)and linearity is achieved.The Ka-band PA is implemented in TSMC 65nm CMOS process.At 1.2V supply voltage,the PA proposed in this paper achieves a saturated output power of 15.9dBm and a PAE of 16%.After linearization,the output power at the ldB compression point is increased by 2dBm,with efficient gain compensation performance.
基金The National Natural Science Foundation of China(No.60702163)the National Science and Technology Major Project(No.2010ZX03007-002-01,2011ZX03004-003)
文摘A digital predistorted class-F power amplifier （PA） using Cree GaN HEMT CGH40010 operating at 2. 12 GHz is presented to obtain high efficiency and excellent linearity for wideband code-division multiple access （ WCDMA ） applications. Measurement results with the continuous wave （CW） signals indicate that the designed class-F PA achieves a peak power-added efficiency （PAE） of 75. 2% with an output power of 39.4 dBm. The adjacent channel power ratio （ACPR） of the designed PA after digital predistortion （DPD） decreases from -28. 3 and -27. 5 dBc to -51.9 and -54. 0 dBc, respectively, for a 4-carrier 20 MHz WCDMA signal with 7. 1 dB peak to average power ratio （PAPR）. The drain efficiency （DE） of the PA is 37. 8% at an average output power of 33. 3 dBm. The designed power amplifier can be aoolied in the WCDMA system.
文摘A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.
基金Project supported by the National Natural Science Foundation of China(No.62001232)。
文摘A power amplifier’s linearity determines the emission signal’s quality and the efficiency of the system.Nonlinear distortion can result in system bit error,out-of-band radiation,and interference with other channels,which severely influence communication system’s quality and reliability.Starting from the third-order intermodulation point of the milimeter wave(mm-Wave)power amplifiers,the circuit’s nonlinearity is compensated for.The analysis,design,and implementation of linear class AB mm-Wave power amplifiers based on GlobalFoundries 45 nm CMOS silicon-on-insulator(SOI)technology are presented.Three single-ended and differential stacked power amplifiers have been implemented based on cascode cells and triple cascode cells operating in U-band frequencies.According to nonlinear analysis and on-wafer measurements,designs based on triple cascode cells outperform those based on cascode cells.Using single-ended measurements,the differential power amplifier achieves a measured peak power-added efficiency(PAE)of 47.2%and a saturated output power(P_(sat))of 25.2 dBm at 44 GHz.The amplifier achieves a P_(sat)higher than 23 dBm and a maximum PAE higher than 25%in the measured bandwidth from 44 GHz to 50 GHz.
文摘本文基于功率MOSFET设计高频宽带线性功率放大器单片集成电路,主要针对功率放大器自身功耗和因高频下电路容性负载引起的信号相移及与此有关的功率放大器的效率问题.特别是选用高频功率MOSFET器件,通过电路优化设计使功放的转换速率达到最大,频带宽度达5-135 MHZ,在60 MHZ频率下,放大器的线性度为1 d B增益压缩点,在20-110 MHZ频率范围内,输入功率12 d B时,放大器的平均和最大增益分别为51.8 d B和53.5 d B,放大器的增益稳定性测试表明,频率60 MHZ,输入功率6 d B时,放大器的增益在24 d B-29 d B区间内波动.
基金Sponsored by the Scientific Research Foundation for the Returned Overseas Chinese Scholars,State Education Ministry
文摘A kind of drive circuit which high-power output for stepping motor, based two-phase hybrid stepping motor are designed, achieved. is low power consumption, high-performance and on BY-5064, and a kind of dedicated circuit for drive control for stepping motor with high-power is
文摘In this paper, a reduced-cost method of measuring residual nonlinearities in an adaptive digitally predistorted amplifier is proposed. Measurements obtained by selective sampling of the amplifier output are integrated over the input envelope range to adapt a fourth-order polynomial predistorter with memory correction. Results for a WCDMA input with a 101 carrier configuration show that a transmitter using the proposed method can meet the adjacent channel leakage ratio （ACLR） specification. Inverse modeling of the nonlinearity is proposed as a future extension that will reduce the cost of the system further.
