The development of nanoelectronics and nanotechnologies has been boosted significantly by the emergence of 2D materials because of their atomic thickness and peculiar properties,and developing a universal,precise patte...The development of nanoelectronics and nanotechnologies has been boosted significantly by the emergence of 2D materials because of their atomic thickness and peculiar properties,and developing a universal,precise patterning technology for single-layer 2D materials is critical for assembling nanodevices.Demonstrated here is a nanomachining technique using electrical breakdown by an AFM tip to fabricate nanopores,nanostrips,and other nanostructures on demand.This can be achieved by voltage scanning or applying a constant voltage while moving the tip.By measuring the electrical current,the formation process on single-layer materials was shown quantitatively.The present results provide evidence of successful pattern fabrication on single-layer MoS2,boron nitride,and graphene,although further confirmation is still needed.The proposed method holds promise as a general nanomachining technology for the future.展开更多
Reducing the process variation is a significant concern for resistive random access memory(RRAM).Due to its ultrahigh integration density,RRAM arrays are prone to lithographic variation during the lithography process,...Reducing the process variation is a significant concern for resistive random access memory(RRAM).Due to its ultrahigh integration density,RRAM arrays are prone to lithographic variation during the lithography process,introducing electrical variation among different RRAM devices.In this work,an optical physical verification methodology for the RRAM array is developed,and the effects of different layout parameters on important electrical characteristics are systematically investigated.The results indicate that the RRAM devices can be categorized into three clusters according to their locations and lithography environments.The read resistance is more sensitive to the locations in the array(~30%)than SET/RESET voltage(<10%).The increase in the RRAM device length and the application of the optical proximity correction technique can help to reduce the variation to less than 10%,whereas it reduces RRAM read resistance by 4×,resulting in a higher power and area consumption.As such,we provide design guidelines to minimize the electrical variation of RRAM arrays due to the lithography process.展开更多
ASET, Association of Super-advanced Electronics Technologies, has been taking the initiative in developing EUV lithography technology in Japan for the past three years. The aspherical mirror metrology using a visible ...ASET, Association of Super-advanced Electronics Technologies, has been taking the initiative in developing EUV lithography technology in Japan for the past three years. The aspherical mirror metrology using a visible light point diffraction interferometer (PDI), the wave front measurement using an at-wavelength PDI, and an at wavelength reflectometry for multilayers, various imaging simulations, multilayer coatings for the mask, the development of absorber materials for mask patterning, the mask substrate cleaning technique, and various photoresist processes have been developed. The visible light PDI employs a 0.5-μm pinhole as an aperture to generate an ideal spherical wave front and can measure a 0.3-N A mirror maximum. The at-wavelength PDI can measure the wave front error of the projection optics. The at-wavelength reflectometer can measure the reflectivity of multilayers and the round-robin test is taking place among ASET, the ALS in Lawrence Berkeley, and BESSY in Germany. The mask cleaning technique employs a supersonic hydro-cleaning technique. We have confirmed that the single layer resists can be used for EUV lithography.展开更多
Nanoimprint lithography(NIL) is an emerging micro/nano-patterning technique,which is a high-resolution,high-throughput and yet simple fabrication process.According to International Technology Roadmap for Semiconductor...Nanoimprint lithography(NIL) is an emerging micro/nano-patterning technique,which is a high-resolution,high-throughput and yet simple fabrication process.According to International Technology Roadmap for Semiconductor(ITRS),NIL has emerged as the next generation lithography candidate for the22 nm and 16 nm technological nodes.In this paper,we present an overview of nanoimprint lithography.The classfication,research focus,critical issues,and the future of nanoimprint lithography are intensively elaborated.A pattern as small as 2.4 nm has been demonstrated.Full-wafer nanoimprint lithography has been completed on a 12-inch wafer.Recently,12.5 nm pattern resolution through soft molecular scale nanoimprint lithography has been achieved by EV Group,a leading nanoimprint lithography technology supplier.展开更多
Optical true delay lines(OTDLs)of low propagation losses,small footprints and high tuning speeds and efficiencies are of critical importance for various photonic applications.Here,we report fabrication of electro-opti...Optical true delay lines(OTDLs)of low propagation losses,small footprints and high tuning speeds and efficiencies are of critical importance for various photonic applications.Here,we report fabrication of electro-optically switchable OTDLs on lithium niobate on insulator using photolithography assisted chemo-mechanical etching.Our device consists of several low-loss optical waveguides of different lengths which are consecutively connected by electro-optical switches to generate different amounts of time delay.The fabricated OTLDs show an ultra-low propagation loss of^0.03dB/cm for waveguide lengths well above 100 cm.展开更多
According to the SIA roadmap, by the year of 2006, minimum feature size of 70 nm on wafer is required. Research in U.S., Japan and Europe is aimed at developing and demonstrating an EUVL tool for critical feature size...According to the SIA roadmap, by the year of 2006, minimum feature size of 70 nm on wafer is required. Research in U.S., Japan and Europe is aimed at developing and demonstrating an EUVL tool for critical feature size of 70 nm and below. In Japan, Himeji institute of technology (HIT) has developed an EUVL laboratory tool , which has a practical exposure field of 30mm×28mm. The alignment and assembly of three aspherical mirror optics were completed. A final wave front error of less than 3 nm was achieved. Using this system, exposure experiments are performed using synchrotron facility of New Subaru. Up to now, 56nm patterns have been replicated in the exposure field of 10mm×1mm. And using scanning stages, 100 nm L&S patterns have been replicated in the field of 10mm×5 mm.展开更多
Two beamlines and stations for soft X-ray lithography and hard X-ray lithography at NSRL are presented. Synchrotron radiation lithography (SRL) and mask techniques are developed, and the micro-electro-mechanical syste...Two beamlines and stations for soft X-ray lithography and hard X-ray lithography at NSRL are presented. Synchrotron radiation lithography (SRL) and mask techniques are developed, and the micro-electro-mechanical systems (MEMS) techniques are also investigated at NSRL. In this paper, some results based on SRL and MEMS techniques are reported, and sub-micron and high aspect ratio microstructures are given. Some micro-devices, such as microreactors are fabricated at NSRL.展开更多
We have been developing debris-free laser plasma sources for EUV lithography since 1996. Two types of debris-free sources, such as cryogenic target and gas-puff target laser plasma sources, were designed and built up ...We have been developing debris-free laser plasma sources for EUV lithography since 1996. Two types of debris-free sources, such as cryogenic target and gas-puff target laser plasma sources, were designed and built up in CIOMP. EUV radiation spectra of the sources with a variety of targets have been obtained by different ways.展开更多
基金supported by the National Natural Science Foundation of China(Grant Nos.12075191,12388101,and 12241201)the Fundamental Research Funds for the Central Universities(Grant No.D5000230120)the Natural Science Basic Research Program of Shaanxi Province(Grant No.2023-JC-YB-541).
文摘The development of nanoelectronics and nanotechnologies has been boosted significantly by the emergence of 2D materials because of their atomic thickness and peculiar properties,and developing a universal,precise patterning technology for single-layer 2D materials is critical for assembling nanodevices.Demonstrated here is a nanomachining technique using electrical breakdown by an AFM tip to fabricate nanopores,nanostrips,and other nanostructures on demand.This can be achieved by voltage scanning or applying a constant voltage while moving the tip.By measuring the electrical current,the formation process on single-layer materials was shown quantitatively.The present results provide evidence of successful pattern fabrication on single-layer MoS2,boron nitride,and graphene,although further confirmation is still needed.The proposed method holds promise as a general nanomachining technology for the future.
基金supported in part by the Open Fund of State Key Laboratory of Integrated Chips and Systems,Fudan Universityin part by the National Science Foundation of China under Grant No.62304133 and No.62350610271.
文摘Reducing the process variation is a significant concern for resistive random access memory(RRAM).Due to its ultrahigh integration density,RRAM arrays are prone to lithographic variation during the lithography process,introducing electrical variation among different RRAM devices.In this work,an optical physical verification methodology for the RRAM array is developed,and the effects of different layout parameters on important electrical characteristics are systematically investigated.The results indicate that the RRAM devices can be categorized into three clusters according to their locations and lithography environments.The read resistance is more sensitive to the locations in the array(~30%)than SET/RESET voltage(<10%).The increase in the RRAM device length and the application of the optical proximity correction technique can help to reduce the variation to less than 10%,whereas it reduces RRAM read resistance by 4×,resulting in a higher power and area consumption.As such,we provide design guidelines to minimize the electrical variation of RRAM arrays due to the lithography process.
文摘ASET, Association of Super-advanced Electronics Technologies, has been taking the initiative in developing EUV lithography technology in Japan for the past three years. The aspherical mirror metrology using a visible light point diffraction interferometer (PDI), the wave front measurement using an at-wavelength PDI, and an at wavelength reflectometry for multilayers, various imaging simulations, multilayer coatings for the mask, the development of absorber materials for mask patterning, the mask substrate cleaning technique, and various photoresist processes have been developed. The visible light PDI employs a 0.5-μm pinhole as an aperture to generate an ideal spherical wave front and can measure a 0.3-N A mirror maximum. The at-wavelength PDI can measure the wave front error of the projection optics. The at-wavelength reflectometer can measure the reflectivity of multilayers and the round-robin test is taking place among ASET, the ALS in Lawrence Berkeley, and BESSY in Germany. The mask cleaning technique employs a supersonic hydro-cleaning technique. We have confirmed that the single layer resists can be used for EUV lithography.
基金supported by Natural Science Foundation of Shanghai(No.11ZR1432100)Shanghai Postdoctoral Science Foundation(11R21420900)
文摘Nanoimprint lithography(NIL) is an emerging micro/nano-patterning technique,which is a high-resolution,high-throughput and yet simple fabrication process.According to International Technology Roadmap for Semiconductor(ITRS),NIL has emerged as the next generation lithography candidate for the22 nm and 16 nm technological nodes.In this paper,we present an overview of nanoimprint lithography.The classfication,research focus,critical issues,and the future of nanoimprint lithography are intensively elaborated.A pattern as small as 2.4 nm has been demonstrated.Full-wafer nanoimprint lithography has been completed on a 12-inch wafer.Recently,12.5 nm pattern resolution through soft molecular scale nanoimprint lithography has been achieved by EV Group,a leading nanoimprint lithography technology supplier.
基金Supported by the National Key R&D Program of China(Grant No.2019YFA0705000)the National Natural Science Foundation of China(Grant Nos.11734009,61590934,and 11874375)+1 种基金the Strategic Priority Research Program of CAS(Grant No.XDB16030300)the Key Project of the Shanghai Science and Technology Committee(Grant No.17JC1400400).
文摘Optical true delay lines(OTDLs)of low propagation losses,small footprints and high tuning speeds and efficiencies are of critical importance for various photonic applications.Here,we report fabrication of electro-optically switchable OTDLs on lithium niobate on insulator using photolithography assisted chemo-mechanical etching.Our device consists of several low-loss optical waveguides of different lengths which are consecutively connected by electro-optical switches to generate different amounts of time delay.The fabricated OTLDs show an ultra-low propagation loss of^0.03dB/cm for waveguide lengths well above 100 cm.
文摘According to the SIA roadmap, by the year of 2006, minimum feature size of 70 nm on wafer is required. Research in U.S., Japan and Europe is aimed at developing and demonstrating an EUVL tool for critical feature size of 70 nm and below. In Japan, Himeji institute of technology (HIT) has developed an EUVL laboratory tool , which has a practical exposure field of 30mm×28mm. The alignment and assembly of three aspherical mirror optics were completed. A final wave front error of less than 3 nm was achieved. Using this system, exposure experiments are performed using synchrotron facility of New Subaru. Up to now, 56nm patterns have been replicated in the exposure field of 10mm×1mm. And using scanning stages, 100 nm L&S patterns have been replicated in the field of 10mm×5 mm.
文摘Two beamlines and stations for soft X-ray lithography and hard X-ray lithography at NSRL are presented. Synchrotron radiation lithography (SRL) and mask techniques are developed, and the micro-electro-mechanical systems (MEMS) techniques are also investigated at NSRL. In this paper, some results based on SRL and MEMS techniques are reported, and sub-micron and high aspect ratio microstructures are given. Some micro-devices, such as microreactors are fabricated at NSRL.
文摘We have been developing debris-free laser plasma sources for EUV lithography since 1996. Two types of debris-free sources, such as cryogenic target and gas-puff target laser plasma sources, were designed and built up in CIOMP. EUV radiation spectra of the sources with a variety of targets have been obtained by different ways.
