Step memory polynomial predistorter for power amplifiers with memory

To reduce the number of digital predistortion coefficients, a step memory polynomial （SMP）predistorter is presented. The number of predistortion coefficients is decreased by adjusting the maximum nonlinear order for different memory orders in the traditional memory polynomial （MP）predistorter. The proposed SNIP predistorter is identified by an offline learning structure on which the coefficients can be extracted directly from the sampled input and output of a PA. Simulation results show that the SMP predistorter is not tied to a particular PA model and is, therefore, robust. The effectiveness of the SMP predistorter is demonstrated by simulations and experiments on an MP model, a parallel Wiener model, a Wiener-Hammerstein model, a sparsedelay memory polynomial model and a real PA which is fabricated based on the Freescale LDMOSFET MRF21030. Compared with the traditional MP predistorter, the SMP predistorter can reduce the number of coefficients by 60%.

RESEARCH ON NONLINEAR DISTORTION IN AMPLIFIERS

Transistors are nonlinear devices, which can produce nonlinear distortion in amplifier while amplifying signals. For weak nonlinear distortion, the expressions of total harmonic distortion (THD), the second order intermodulation distortion(IM2 ), the third order intermodulation distortion(IM 3) and intercept point(IP 3) are deduced. With the aid of software Multisim, we simulate transistor common emitter amplifier, transistor common emitter amplifier with resistor in emitter, differential amplifier and differential amplifier with resistor between emitters. The simulational results and theoretical analyses are almost the same.

Behavioral modeling of RF power amplifiers with time-delay feed-forward neural networks

A novel behavioral model using three-layer time-delay feed-forward neural networks （TDFFNN）is adopted to model radio frequency （RF）power amplifiers exhibiting memory nonlinearities. In order to extract the parameters, the back- propagation algorithm is applied to train the proposed neural networks. The proposed model is verified by the typical odd- order-only memory polynomial model in simulation, and the performance is compared with different numbers of taped delay lines（TDLs） and perceptrons of the hidden layer. For validating the TDFFNN model by experiments, a digital test bench is set up to collect input and output data of power amplifiers at a 60 × 10^6 sample/s sampling rate. The 3.75 MHz 16-QAM signal generated in the vector signal generator（VSG） is chosen as the input signal, when measuring the dynamic AM/AM and AM/PM characteristics of power amplifiers. By comparisons and analyses, the presented model provides a good performance in convergence, accuracy and efficiency, which is approved by simulation results and experimental results in the time domain and frequency domain.

Design of Low-Voltage Low Noise Amplifiers with High Linearity

A CMOS radio frequency low noise amplifier with high linearity and low operation voltage of less than 1.0V is presented.In this circuit,an auxiliary MOSFET in the triode region is used to boost the linearity.Simulation shows that this method can boost the input-referred 3rd-order intercept point with much less power dissipation than that of traditional power/linearity tradeoff solution which pays at least 1dB power for 1dB linearity improvement.It is also shown that the size of the common-gate PMOS transistor needs to be optimized to reduce its loaded input impedance so as not to degrade the linearity due to high voltage gain at its source terminal.The simulation is carried out with TSMC 0.18μm RF CMOS technology and SpectreRF.

Nested Miller Active-Capacitor Frequency Compensation for Low-Power Three-Stage Amplifiers

A new frequency compensation technique for low-power, area-efficient multistage amplifiers is introduced. Using nested active capacitors, our scheme achieves better bandwidth-to-power and slew-rate-to-power performances than previous works. Implemented in standard 0.35μm CMOS technology, our three-stage amplifier achieves 105dB DC gain, 3.3M GBW,68 phase margin, and 2.56V/μs average slew rate under a 150pF capacitive load. All of these are realized with only 40μW power consumption under a 2V power supply,with very small compensation capacitors.

Capacitance Sensing and Software-Realized Lock-in Amplifier for the Electromagnetically Levitated Micro Gyroscope

In the novel prototype of micro-gyroscope structure,the new configured capacitance sensing scheme for the micro gyroscope was analyzed and the virtual instrument based detection scheme was implemented.The digital lock-in amplifier was employed in the capacitance detection to restrain the noise interference.The capacitance analysis shows that 1 fF capacitance variation corresponds to 0.1 degree of the turn angle.The differential capacitance bridge and the charge integral amplifier were used as the front signal input interface.In the implementation of digital lock-in amplifier,a new routine which warranted the exactly matching of the reference phase to signal phase was proposed.The result of the experiment shows that digital lock-in amplifier can greatly eliminate the noise in the output signal.The non linearity of the turn angle output is 2.3% and the minimum resolution of turn angle is 0.04 degrees.The application of the software demodulation in the signal detection of micro-electro-mechanical-system(MEMS)device is a new attempt,and it shows the prospective for a high-performance application.

A virtual lock-in amplifier,spectrum analyzer,impedance meter and semiconductor analyzer implemented on an SR7265 hardware target

Lock-in amplifiers are used to detect and measure very small alternating current(AC)signals down to the range of nVs.Accurate measurements can be made even when the small signals are buried by noise thousands of times larger.With the digital signal processing(DSP)technology involved in modern instrumentation,a lock-in amplifier is more versatile in sensing and recovering small signals.Combining the virtual instrumentation technology,we reorganize the functional blocks of a programmable lock-in amplifier and build it as a virtual spectrum analyzer,virtual impedance meter,virtual network analyzer,virtual semiconductor parameter analyzer,signal generator,etc.A 4 layer model is used to implement these virtual instruments.The same virtual instrument can also be implemented on a general purpose FPGA developing board.

Design of a memory polynomial predistorter for wideband envelope tracking amplifiers

Efficiency and linearity of the microwave power amplifier are critical elements for mobile communication systems. A memory polynomial baseband predistorter based on an indirect learning architecture is presented for improving the linearity of an envelope tracing （ET） amplifier with application to a wireless transmitter. To deal with large peak-to-average ratio （PAR） problem, a clipping procedure for the input signal is employed. Then the system performance is verified by simulation results. For a single carrier wideband code division multiple access （WCDMA） signal of 16-quadrature amplitude modulation （16-QAM）, about 2% improvement of the error vector magnitude （EVM） is achieved at an average output power of 45.5 dBm and gain of 10.6 dB, with adjacent channel leakage ratio （ACLR） of -64.55 dBc at offset frequency of 5 MHz. Moreover, a three-carrier WCDMA signal and a third-generation （3G） long term evolution （LTE） signal are used as test signals to demonstrate the performance of the proposed linearization scheme under different bandwidth signals.

High Power Passive Phase Locking of Four Yb-Doped Fiber Amplifiers by an All-Optical Feedback Loop

We report the passive phase locking of four high power Yb-doped fiber amplifiers with ring cavity.The interference patterns at different output power are observed and the Strehl ratios are measured.The maximum coherent output power of the fiber array is up to 1062 W by multi-stage amplification.The stable beam profiles of various phase relationships are observed by controlling the position of the feedback fiber,in good agreement with the calculated results.By using master oscillator power-amplifier(MOPA)architecture and broadband operation of passively phased systems,higher power scaling with high beam quality appears to be feasible.

Design Technologies for Silicon-Based High-Efficiency RF Power Amplifiers:A Brief Overview

This paper presents a brief overview of several promising design technologies for high efficiency silicon-based radio frequency （RF） power amplifiers （PAs） as well as the use of these technologies in mobile broadband wireless communications. Four important aspects of PA design are addressed in this paper. First, we look at class-E PA design equations and provide an example of a class-E PA that achieves efficiency of 65-70% at 2.4 GHz. Then, we discuss state-of-the-art envelope tracking （ET） design for monolithic wideband RF mobile transmitter applications. A brief overview of Doherty PA design for the next-generation wireless handset applications is then given. Towards the end of the paper, we discuss an inherently broadband and highly efficient class-J PA design targeting future multi-band multi-standard wireless communication protocols.

Adaptive Digital Predistortion Schemes to Linearize RF Power Amplifiers with Memory Effects

To compensate for nonlinear distortion introduced by RF power amplifiers （PAs） with memory effects, two correlated models, namely an extended memory polynomial （EMP） model and a memory lookup table （LUT） model, are proposed for predistorter design. Two adaptive digital predistortion （ADPD） schemes with indirect learning architecture are presented. One adopts the EMP model and the recursive least square （RLS） algorithm, and the other utilizes the memory LUT model and the least mean square （LMS） algorithm. Simulation results demonstrate that the EMP-based ADPD yields the best linearization performance in terms of suppressing spectral regrowth. It is also shown that the ADPD based on memory LUT makes optimum tradeoff between performance and computational complexity.

Quantum-dot Semiconductor Optical Amplifiers in State Space Model

A state space model(SSM) is derived for quantum-dot semiconductor optical amplifiers(QD-SOAs).Rate equations of QD-SOA are formulated in the form of state update equations,where average occupation probabilities along QD-SOA cavity are considered as state variables of the system.Simulations show that SSM calculates QD-SOA′s static and dynamic characteristics with high accuracy.

Latest advances in high-performance light sources and optical amplifiers on silicon

Efficient light generation and amplification has long been missing on the silicon platform due to its well-known indirect bandgap nature.Driven by the size,weight,power and cost(SWaP-C)requirements,the desire to fully realize integrated silicon electronic and photonic integrated circuits has greatly pushed the effort of realizing high performance on-chip lasers and amplifiers moving forward.Several approaches have been proposed and demonstrated to address this issue.In this paper,a brief overview of recent progress of the high-performance lasers and amplifiers on Si based on different technology is presented.Representative device demonstrations,including ultra-narrow linewidthⅢ-Ⅴ/Si lasers,fully integratedⅢ-Ⅴ/Si/Si3N4 lasers,high-channel count mode locked quantum dot(QD)lasers,and high gain QD amplifiers will be covered.

A Novel and Fast Model of Erbium-doped Fiber Amplifiers

A novel and fast model of erbium-doped fiber amplifiers (EDFAs) is presented. By calculating a typical EDFA, numerical results are compared with the results obtained by spectral-solved method. The results of comparison show that such a model can improve the computational speed and preserve the precision. Some characteristics of the EDFA are then analyzed using this model. The results are consistent with those of the experiments.

5G Wideband Bandpass Filtering Power Amplifiers Based on a Bandwidth-Extended Bandpass Matching Network

In this paper,a 5G wideband power amplifier(PA)with bandpass filtering response is synthesized using a bandwidth-extended bandpass filter as the matching network(MN).In this structure,the bandwidth(θ_(C))is defined as a variable in the closedform equations provided by the microstrip bandpass filter.It can be extended over a wide range only by changing the characteristic impedances of the structure.Different from the other wideband MNs,the extension of bandwidth does not increase the complexity of the structure(order n is fixed).In addition,based on the bandwidth-extended structure,the wideband design of bandpass filtering PA is not limited to the fixed bandwidth of the specific filter structure.The theoretical analysis of the MN and the design flow of the PA are provided in this design.The fabricated bandpass filtering PA can support almost one-octave bandwidth(2-3.8 GHz),covering the two 5G bands(n41 and n78).The drain efficiency of 47%-60%and output power higher than 40 dBm are measured.Good frequency selectivity in S-parameter measurements can be observed.

Double Grating Expanders for Fourth-Order Dispersion Compensation in Chirped Pulse Amplifiers

A scheme of double grating expanders is first proposed for high energy chirped pulse amplifiers.It is demonstrated that they can compensate for the amplifier's material dispersion up to the fourth-order,together with a suitable grating compressor.The scheme makes it possible that the pulse expansion in Chirped pulse amplifiers(CPAs)is no longer restricted by the material dispersion,and the corresponding grating compressor can be independently optimized according to the available gratings'size and damage threshold.

Pruned Volterra Models with Memory Effects for Nonlinear Power Amplifiers

In this letter, a novel model is proposed for modeling the nonlinearity and memory effects of power amplifiers. The classical Volterra model is modified through a function of the sum of nonlinearity order with sum of memory length. The parameters of this model can be extracted in digital domain since the model is analyzed based on the envelope signals. The model we proposed enables a substantial reduction in the number of coefficients involved, and with excellent accuracy.

Adaptive Quasi-PID Control Method for Switching Power Amplifiers

Quasi-PID control method that is able to effectively inhibit the inherent tracking error of PI control method is proposed on the basis of a rounded theoretical analysis of a model of switching power amplifiers (SPAs). To avoid the harmful impacts of the circuit parameter variations and the random disturbances on quasi-PID control method, a single neuron is introduced to endow it with self-adaptability. Quasi-PID control method and the single neuron combine with each other perfectly, and their formation is named as single-neuron adaptive quasi-PID control method. Simulation and experimental results show that single-neuron adaptive quasi-PID control method can accurately track both the predictable and the unpredictable waveforms. Quantitative analysis demonstrates that the accuracy of single-neuron adaptive quasi-PID control method is comparable to that of linear power amplifiers (LPAs) and so can fulfill the requirements of some high-accuracy applications, such as protective relay test. Such accuracy is very difficult to be achieved by many modern control methods for converter controls. Compared with other modern control methods, the programming realization of single-neuron adaptive quasi-PID control method is more suitable for real-time applications and realization on low-end microprocessors for its simple structure and lower computational complexity.

Networking Intelligent Pressure Sensor Using Digital Lock-in Amplification Technology

Introducing a System-on-Chip （SoC） microcontroller （C8051F350） into a ceramic pressure sensor has resulted in the design of a intelligent sensor. An improved algorithm for digital phassensitive detection is used to perform lock-in amplification of the sensor signal. The compensation for the sensor error is realized by the detection of the sensor＇s supply voltage and working temperature. The system also has the function of short/open circuit fault detection and can ommamicate with other digital equipment through an RS-485 communication interface. In the design, full utilization of the SoC microcontroller＇ s internal resource results in the simple hardware structure. Experimental results show that the error of the sensor is less than 0.5% at range ratio 1 ： 10. Employing the microcontroller and using lock-in amplification algorithm are an effective method for achieving an intelligent sensor of slowly-varying physical quantities, thereby improving the measuring accuracy and performance.

A Transfer Matrix-Based Analysis of Vertical-Cavity Semiconductor Optical Amplifiers

Based on the transfer matrix method, we present a new one-dimensional steady-state model of vertical-cavity semiconductor optical amplifiers （VCSOAs）, in which the longitudinal carrier concentration distribution in the active region and the discontinuity of the refractive index inside the cavity is taken into consideration. The model is theoretically proven to be a reliable one for describing the standing wave effect in a periodic gain structure. By using this model, some optical amplification characteristics of VCSOAs are investigated.