A Study of the European Union’s Path for Constructing Digital Governance Rules and the Logical Implications of the Path

The European Union(EU)seeks to build a Europe fit for the digital age.For this purpose,the EU has accelerated the process of catching up with digital technology and issued a number of legal and regulatory documents to establish a digital governance rule regime with EU characteristics.This paper analyzes the EU’s path towards the construction of digital governance rules.This path is composed of three aspects,i.e.,strict digital supervision,differentiation of the free market,and multi-stakeholder governance.This three-step path has intrinsic logical implications.That is,strict digital supervision is applied to defend the EU’s unified market and values;differentiation of the free market takes the principle of adequate protection as the core to make the EU an exporter of rules;multi-stakeholder governance brings multiple stakeholders together in the governance to deal with the ethical anomie that arises during the use of big data.By setting up a series of digital governance rules,the EU seeks to achieve rule dominance to gain regulatory power for global digital governance.However,due to multiple constraints,there is a long way to go,and there are obstacles in the way.

Optimized stateful material implication logic for three- dimensional data manipulation

The monolithic three-dimensional integration of memory and logic circuits could dramatically improve the performance and energy efficiency of computing systems. Some conventional and emerging memories are suitable for vertical integration, including highly scalable metal-oxide resistive switching devices （＂memristors＂）. However, the integration of logic circuits has proven to be much more challenging than expected. In this study, we demonstrated memory and logic functionality in a monolithic three-dimensional circuit by adapting the recently proposed memristor-based stateful material implication logic. By modifying the original circuit to increase its robustness to device imperfections, we experimentally showed, for the first time, a reliable multi-cycle multi-gate material implication logic operation and half-adder circuit within a three- dimensional stack of monolithically integrated memristors. Direct data manipulation in three dimensions enables extremely compact and high-throughput logic- in-memory computing and, remarkably, presents a viable solution for the Feynman Grand Challenge of implementing an 8-bit adder at the nanoscale.