Routing technology has been forced to evolve towards higher capacity and per port packet processing speed. The ability to achieve high forwarding speed is due to either software or hardware technology. TCAM (Ternary C...Routing technology has been forced to evolve towards higher capacity and per port packet processing speed. The ability to achieve high forwarding speed is due to either software or hardware technology. TCAM (Ternary Content Addressable Memory) provides a performance advantage over other software or hardware search algorithms, often resulting in an order of magnitude reduction of search time. But slow updates may affect the performance of TCAM based routing lookup. So the key is to design a table management algorithm, which supports high speed updates in TCAMs. This paper presented three table management algorithms, and then compared their performance. Finally, the optimal one after comparing was given.展开更多
The growing trend of network virtualization results in a widespread adoption of virtual switches in virtualized environments. However, virtual switching is confronted with great performance challenges regarding packet...The growing trend of network virtualization results in a widespread adoption of virtual switches in virtualized environments. However, virtual switching is confronted with great performance challenges regarding packet classification especially in Open Flow-based software defined networks. This paper first takes an insight into packet classification in virtual Open Flow switching, and points out that its performance bottleneck is dominated by flow table traversals of multiple failed mask probing for each arrived packet. Then we are motivated to propose an efficient packet classification algorithm based on counting bloom filters. In particular, counting bloom filters are applied to predict the failures of flow table lookups with great possibilities, and bypass flow table traversals for failed mask probing. Finally, our proposed packet classification algorithm is evaluated with real network traffic traces by experiments. The experimental results indicate that our proposed algorithm outperforms the classical one in Open v Switch in terms of average search length, and contributes to promote virtual Open Flow switching performance.展开更多
Distributed Hash Tables (DHTs) were originated from the design of structured peer-to-peer (P2P) systems. A DHT provides a key-based lookup service similar to a hash table. In this paper, we present the detailed design...Distributed Hash Tables (DHTs) were originated from the design of structured peer-to-peer (P2P) systems. A DHT provides a key-based lookup service similar to a hash table. In this paper, we present the detailed design of a new DHT protocol, Tambour. The novelty of the protocol is that it uses parallel lookup to reduce retrive latency and bounds communication overhead to a dynamically adjusted routing table. Tambour estimates the probabilities of routing entries' liveness based on statistics of node lifetime history and evicts dead entries after lookup failures. When the network is unstable, more routing entries will be evicted in a given period of time, and the routing tables will be getting smaller which minimize the number of timeouts for later lookup requests. An experimental prototype of Tambour has been simulated and compared against two popular DHT protocols. Results show that Tambour outperforms the compared systems in terms of bandwith cost, lookup latency and the overall efficiency.展开更多
Microsoft Excel是最优秀的电子表格软件之一,但其不仅仅是电子表格,其具有强大的数据处理和数据分析能力。在销售、工资核算等工作中经常用到多表联合查询与计算等操作,使用Excel内置的LOOKUP和VLOOKUP等函数可以产生类似操作数据库的...Microsoft Excel是最优秀的电子表格软件之一,但其不仅仅是电子表格,其具有强大的数据处理和数据分析能力。在销售、工资核算等工作中经常用到多表联合查询与计算等操作,使用Excel内置的LOOKUP和VLOOKUP等函数可以产生类似操作数据库的效果,轻松地完成工作。展开更多
Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common buildi...Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common building blocks in most of the DSP units which demands low power and area constraints in the field of portable biomedical devices.This research works attempts multiple power reduction technique to limit the power dissipation of the proposed LUT multiplier unit.A lookup table-based multiplier has the advantage of almost constant area requirement’s irrespective to the increase in bit size of multiplier.Clock gating is usually used to reduce the unnecessary switching activities in idle circlet components.A clock tree structure is employed to enhance the SRAM based lookup table memory architecture.The LUT memory access operation is sequential in nature and instead of address decoder a ring counter is used to scan the memory contents and gated driver tree structure is implemented to control the clock and data switching activities.The proposed algorithm yields 20%of power reduction than existing.展开更多
To compensate for nonlinear distortion introduced by RF power amplifiers (PAs) with memory effects, two correlated models, namely an extended memory polynomial (EMP) model and a memory lookup table (LUT) model, ...To compensate for nonlinear distortion introduced by RF power amplifiers (PAs) with memory effects, two correlated models, namely an extended memory polynomial (EMP) model and a memory lookup table (LUT) model, are proposed for predistorter design. Two adaptive digital predistortion (ADPD) schemes with indirect learning architecture are presented. One adopts the EMP model and the recursive least square (RLS) algorithm, and the other utilizes the memory LUT model and the least mean square (LMS) algorithm. Simulation results demonstrate that the EMP-based ADPD yields the best linearization performance in terms of suppressing spectral regrowth. It is also shown that the ADPD based on memory LUT makes optimum tradeoff between performance and computational complexity.展开更多
A halftone watermarking method of high quality, robustness, and capacity flexibility is presented in this paper. An objective halftone image quality evaluation method based on the human visual system obtained by a lea...A halftone watermarking method of high quality, robustness, and capacity flexibility is presented in this paper. An objective halftone image quality evaluation method based on the human visual system obtained by a least-mean-square algorithm is also introduced. In the encoder, the kernels-alternated error diffusion (KAEDF) is applied. It is able to maintain the computational complexity at the same level as ordinary error diffusion. Compared with Hel-Or using ordered dithering, the proposed KAEDF yields a better image quality through using error diffusion. We also propose a weighted lookup table (WLUT) in the decoder instead of lookup table (LUT), as proposed by Pei and Guo, so as to achieve a higher decoded rate. As the experimental results demonstrate, this technique is able to guard against degradation due to tampering, cropping, rotation, and print-and-scan processes in error-diffused halftone images.展开更多
Efficient lookup is essential for peer-to-peer networks and Chord is a representative peer-to-peer lookup scheme based on distributed hash table (DHT). In peer-to-peer networks, each node maintains several unidirectio...Efficient lookup is essential for peer-to-peer networks and Chord is a representative peer-to-peer lookup scheme based on distributed hash table (DHT). In peer-to-peer networks, each node maintains several unidirectional application layer links to other nodes and forwards lookup messages through such links. This paper proposes use of bidirectional links to improve the lookup performance in Chord. Every original unidirectional link is replaced by a bidirectional link, and accordingly every node becomes an anti-finger of all its finger nodes. Both theoretical analyses and experimental results indicate that these anti-fingers can help improve the lookup performance greatly with very low overhead.展开更多
In this paper,it has proposed a realtime implementation of low-density paritycheck(LDPC) decoder with less complexity used for satellite communication on FPGA platform.By adopting a(2048.4096)irregular quasi-cyclic(QC...In this paper,it has proposed a realtime implementation of low-density paritycheck(LDPC) decoder with less complexity used for satellite communication on FPGA platform.By adopting a(2048.4096)irregular quasi-cyclic(QC) LDPC code,the proposed partly parallel decoding structure balances the complexity between the check node unit(CNU) and the variable node unit(VNU) based on min-sum(MS) algorithm,thereby achieving less Slice resources and superior clock performance.Moreover,as a lookup table(LUT) is utilized in this paper to search the node message stored in timeshare memory unit,it is simple to reuse and save large amount of storage resources.The implementation results on Xilinx FPGA chip illustrate that,compared with conventional structure,the proposed scheme can achieve at last 28.6%and 8%cost reduction in RAM and Slice respectively.The clock frequency is also increased to 280 MHz without decoding performance deterioration and convergence speed reduction.展开更多
Gain based predistorter (PD) is a highly effective and simple digital baseband predistorter which compensates for the nonlinear distortion of PAs. Lookup table (LUT) is the core of the gain based PD. This paper presen...Gain based predistorter (PD) is a highly effective and simple digital baseband predistorter which compensates for the nonlinear distortion of PAs. Lookup table (LUT) is the core of the gain based PD. This paper presents a discrete Newton’s method based adaptive technique to modify LUT. We simplify and convert the hardship of adaptive updating LUT to the roots finding problem for a system of two element real equations on athematics. And we deduce discrete Newton’s method based adaptive iterative formula used for updating LUT. The iterative formula of the proposed method is in real number field, but secant method previously published is in complex number field. So the proposed method reduces the number of real multiplications and is implemented with ease by hardware. Furthermore, computer simulation results verify gain based PD using discrete Newton’s method could rectify nonlinear distortion and improve system performance. Also, the simulation results reveal the proposed method reaches to the stable statement in fewer iteration times and less runtime than secant method.展开更多
文摘Routing technology has been forced to evolve towards higher capacity and per port packet processing speed. The ability to achieve high forwarding speed is due to either software or hardware technology. TCAM (Ternary Content Addressable Memory) provides a performance advantage over other software or hardware search algorithms, often resulting in an order of magnitude reduction of search time. But slow updates may affect the performance of TCAM based routing lookup. So the key is to design a table management algorithm, which supports high speed updates in TCAMs. This paper presented three table management algorithms, and then compared their performance. Finally, the optimal one after comparing was given.
基金supported in part by National Natural Science Foundation of China(61272148,61572525,61502056,and 61602525)Hunan Provincial Natural Science Foundation of China(2015JJ3010)Scientific Research Fund of Hunan Provincial Education Department(15B009,14C0285)
文摘The growing trend of network virtualization results in a widespread adoption of virtual switches in virtualized environments. However, virtual switching is confronted with great performance challenges regarding packet classification especially in Open Flow-based software defined networks. This paper first takes an insight into packet classification in virtual Open Flow switching, and points out that its performance bottleneck is dominated by flow table traversals of multiple failed mask probing for each arrived packet. Then we are motivated to propose an efficient packet classification algorithm based on counting bloom filters. In particular, counting bloom filters are applied to predict the failures of flow table lookups with great possibilities, and bypass flow table traversals for failed mask probing. Finally, our proposed packet classification algorithm is evaluated with real network traffic traces by experiments. The experimental results indicate that our proposed algorithm outperforms the classical one in Open v Switch in terms of average search length, and contributes to promote virtual Open Flow switching performance.
文摘Distributed Hash Tables (DHTs) were originated from the design of structured peer-to-peer (P2P) systems. A DHT provides a key-based lookup service similar to a hash table. In this paper, we present the detailed design of a new DHT protocol, Tambour. The novelty of the protocol is that it uses parallel lookup to reduce retrive latency and bounds communication overhead to a dynamically adjusted routing table. Tambour estimates the probabilities of routing entries' liveness based on statistics of node lifetime history and evicts dead entries after lookup failures. When the network is unstable, more routing entries will be evicted in a given period of time, and the routing tables will be getting smaller which minimize the number of timeouts for later lookup requests. An experimental prototype of Tambour has been simulated and compared against two popular DHT protocols. Results show that Tambour outperforms the compared systems in terms of bandwith cost, lookup latency and the overall efficiency.
文摘Digital design of a digital signal processor involves accurate and high-speed mathematical computation units.DSP units are one of the most power consuming and memory occupying devices.Multipliers are the common building blocks in most of the DSP units which demands low power and area constraints in the field of portable biomedical devices.This research works attempts multiple power reduction technique to limit the power dissipation of the proposed LUT multiplier unit.A lookup table-based multiplier has the advantage of almost constant area requirement’s irrespective to the increase in bit size of multiplier.Clock gating is usually used to reduce the unnecessary switching activities in idle circlet components.A clock tree structure is employed to enhance the SRAM based lookup table memory architecture.The LUT memory access operation is sequential in nature and instead of address decoder a ring counter is used to scan the memory contents and gated driver tree structure is implemented to control the clock and data switching activities.The proposed algorithm yields 20%of power reduction than existing.
文摘To compensate for nonlinear distortion introduced by RF power amplifiers (PAs) with memory effects, two correlated models, namely an extended memory polynomial (EMP) model and a memory lookup table (LUT) model, are proposed for predistorter design. Two adaptive digital predistortion (ADPD) schemes with indirect learning architecture are presented. One adopts the EMP model and the recursive least square (RLS) algorithm, and the other utilizes the memory LUT model and the least mean square (LMS) algorithm. Simulation results demonstrate that the EMP-based ADPD yields the best linearization performance in terms of suppressing spectral regrowth. It is also shown that the ADPD based on memory LUT makes optimum tradeoff between performance and computational complexity.
基金supported by National Science Council under Grants No. NSC 99-2631-H-011-001
文摘A halftone watermarking method of high quality, robustness, and capacity flexibility is presented in this paper. An objective halftone image quality evaluation method based on the human visual system obtained by a least-mean-square algorithm is also introduced. In the encoder, the kernels-alternated error diffusion (KAEDF) is applied. It is able to maintain the computational complexity at the same level as ordinary error diffusion. Compared with Hel-Or using ordered dithering, the proposed KAEDF yields a better image quality through using error diffusion. We also propose a weighted lookup table (WLUT) in the decoder instead of lookup table (LUT), as proposed by Pei and Guo, so as to achieve a higher decoded rate. As the experimental results demonstrate, this technique is able to guard against degradation due to tampering, cropping, rotation, and print-and-scan processes in error-diffused halftone images.
文摘Efficient lookup is essential for peer-to-peer networks and Chord is a representative peer-to-peer lookup scheme based on distributed hash table (DHT). In peer-to-peer networks, each node maintains several unidirectional application layer links to other nodes and forwards lookup messages through such links. This paper proposes use of bidirectional links to improve the lookup performance in Chord. Every original unidirectional link is replaced by a bidirectional link, and accordingly every node becomes an anti-finger of all its finger nodes. Both theoretical analyses and experimental results indicate that these anti-fingers can help improve the lookup performance greatly with very low overhead.
文摘In this paper,it has proposed a realtime implementation of low-density paritycheck(LDPC) decoder with less complexity used for satellite communication on FPGA platform.By adopting a(2048.4096)irregular quasi-cyclic(QC) LDPC code,the proposed partly parallel decoding structure balances the complexity between the check node unit(CNU) and the variable node unit(VNU) based on min-sum(MS) algorithm,thereby achieving less Slice resources and superior clock performance.Moreover,as a lookup table(LUT) is utilized in this paper to search the node message stored in timeshare memory unit,it is simple to reuse and save large amount of storage resources.The implementation results on Xilinx FPGA chip illustrate that,compared with conventional structure,the proposed scheme can achieve at last 28.6%and 8%cost reduction in RAM and Slice respectively.The clock frequency is also increased to 280 MHz without decoding performance deterioration and convergence speed reduction.
文摘Gain based predistorter (PD) is a highly effective and simple digital baseband predistorter which compensates for the nonlinear distortion of PAs. Lookup table (LUT) is the core of the gain based PD. This paper presents a discrete Newton’s method based adaptive technique to modify LUT. We simplify and convert the hardship of adaptive updating LUT to the roots finding problem for a system of two element real equations on athematics. And we deduce discrete Newton’s method based adaptive iterative formula used for updating LUT. The iterative formula of the proposed method is in real number field, but secant method previously published is in complex number field. So the proposed method reduces the number of real multiplications and is implemented with ease by hardware. Furthermore, computer simulation results verify gain based PD using discrete Newton’s method could rectify nonlinear distortion and improve system performance. Also, the simulation results reveal the proposed method reaches to the stable statement in fewer iteration times and less runtime than secant method.