Solid-state NMR study on sodium intercalation at low voltage window for Na_(3)V_(2)(PO_(4))_(3) as an anode

In-situ XRD,^(31)P NMR and ^(23)Na NMR were used to analyze the interaction behavior of Na_(3)V_(2)(PO_(4))_(3) at low voltage,and then a new intercalation model was proposed.During the transition from Na_(3)V_(2)(PO_(4))_(3) to Na_(4)V_(2)(PO_(4))_(3),Na ions insert into M1,M2 and M3 sites simultaneously.Afterwards,during the transition of Na_(4)V_(2)(PO_(4))_(3)to Na_(5)V_(2)(PO_(4))_(3),Na ions mainly insert into M3 site.

Improved RF power performance of InAlN/GaN HEMT by optimizing rapid thermal annealing process for high-performance low-voltage terminal applications

Improved radio-frequency(RF)power performance of InAlN/GaN high electron mobility transistor(HEMT)is achieved by optimizing the rapid thermal annealing(RTA)process for high-performance low-voltage terminal applications.By optimizing the RTA temperature and time,the optimal annealing condition is found to enable low parasitic resistance and thus a high-performance device.Besides,compared with the non-optimized RTA HEMT,the optimized one demonstrates smoother ohmic metal surface morphology and better heterojunction quality including the less degraded heterojunction sheet resistance and clearer heterojunction interfaces as well as negligible material out-diffusion from the barrier to the channel and buffer.Benefiting from the lowered parasitic resistance,improved maximum output current density of 2279 mA·mm^(-1)and higher peak extrinsic transconductance of 526 mS·mm^(-1)are obtained for the optimized RTA HEMT.In addition,due to the superior heterojunction quality,the optimized HEMT shows reduced off-state leakage current of 7×10^(-3)mA·mm^(-1)and suppressed current collapse of only 4%,compared with those of 1×10^(-1)mA·mm^(-1)and 15%for the non-optimized one.At 8 GHz and V_(DS)of 6 V,a significantly improved power-added efficiency of 62%and output power density of 0.71 W·mm^(-1)are achieved for the optimized HEMT,as the result of the improvement in output current,knee voltage,off-state leakage current,and current collapse,which reveals the tremendous advantage of the optimized RTA HEMT in high-performance low-voltage terminal applications.

Demonstration and modeling of unipolar-carrier-conduction GaN Schottky-pn junction diode with low turn-on voltage

By introducing a thin p-type layer between the Schottky metal and n-GaN layer, this work presents a Schottky-pn junction diode(SPND) configuration for the GaN rectifier fabrication. Specific unipolar carrier conduction characteristic is demonstrated by the verification of temperature-dependent current–voltage(I–V) tests and electroluminescence spectra.Meanwhile, apparently advantageous forward conduction properties as compared to the pn diode fabricated on the same wafer have been achieved, featuring a lower turn-on voltage of 0.82 V. Together with the analysis model established in the GaN SPND for a wide-range designable turn-on voltage, this work provides an alternative method to the GaN rectifier strategies besides the traditional solution.

Research on Low Voltage Series Arc Fault Prediction Method Based on Multidimensional Time-Frequency Domain Characteristics

The load types in low-voltage distribution systems are diverse.Some loads have current signals that are similar to series fault arcs,making it difficult to effectively detect fault arcs during their occurrence and sustained combustion,which can easily lead to serious electrical fire accidents.To address this issue,this paper establishes a fault arc prototype experimental platform,selects multiple commonly used loads for fault arc experiments,and collects data in both normal and fault states.By analyzing waveform characteristics and selecting fault discrimination feature indicators,corresponding feature values are extracted for qualitative analysis to explore changes in timefrequency characteristics of current before and after faults.Multiple features are then selected to form a multidimensional feature vector space to effectively reduce arc misjudgments and construct a fault discrimination feature database.Based on this,a fault arc hazard prediction model is built using random forests.The model’s multiple hyperparameters are simultaneously optimized through grid search,aiming tominimize node information entropy and complete model training,thereby enhancing model robustness and generalization ability.Through experimental verification,the proposed method accurately predicts and classifies fault arcs of different load types,with an average accuracy at least 1%higher than that of the commonly used fault predictionmethods compared in the paper.

A Hybrid Five-Level Single-Phase Rectifier with Low Common-Mode Voltage

Rectifiers with high efficiency and high power density are crucial to the stable and efficient power supply of 5G communication base stations,which deserves in-depth investigation.In general,there are two key problems to be addressed:supporting both alternating current(AC)and direct current(DC)input,and minimizing the common-mode voltage as well as leakage current for safety reasons.In this paper,a hybrid five-level single-phase rectifier is proposed.A five-level topology is adopted in the upper arm,and a half-bridge diode topology is adopted in the lower arm.A dual closed-loop control strategy and a flying capacitor voltage regulation method are designed accordingly so that the compatibility of both AC and DC input is realized with low common voltage and small passive devices.Simulation and experimental results demonstrate the effectiveness and performance of the proposed rectifier.

Low Voltage CMOS Gilbert Mixers for Bluetooth Transceiver

Based on the analyses of the reported Gilbert mixers operating at low supply vol tage,a down-conversion mixer and an up-conversion mixer for 2.4GHz bluetooth transceiver are presented with the modified low voltage design techniques,respe ctively.Feedback and current mirror techniques suitable for low voltage operatio n are used to improve the linearity of the up-conversion mixer,and folded-casc ode output stage is adopted to optimize the noise and conversion gain of the dow n-conversion mixer operating at low voltage.Based on 0.35μm CMOS technology,s imulations are performed with 2V supply voltage.The results show that 20dBm thir d-order intercept point (IIP3),87mV output signal amplitude are achieved for up -conversion mixer with about 3mA current;while 20dB conversion gain (CG),6.5nV /Hz input-referred noise,4.4dBm IIP3 are obtained for down-conversion mixer with about 3.5mA current.

Grain refinement of as-cast superalloy IN718 under action of low voltage pulsed magnetic field

The grain refinement of superalloy IN718 under the action of low voltage pulsed magnetic field was investigated. The experimental results show that fine equiaxed grains are acquired under the action of low voltage pulsed magnetic field. The refinement effect of the pulsed magnetic field is affected by the melt cooling rate and superheating. The decrease of cooling rate and superheating enhance the refinement effect of the low voltage pulsed magnetic field. The magnetic force and the melt flow during solidification are modeled and simulated to reveal the grain refinement mechanism. It is considered that the melt convection caused by the pulsed magnetic field, as well as cooling rate and superheating contributes to the refinement of solidified grains.

A Novel Offset-Cancellation Technique for Low Voltage CMOS Differential Amplifiers

Based on a physical understanding of nonlinearity and mismatch, a novel offset-cancellation technique for low voltage CMOS differential amplifiers is proposed. The technique transfers the offset voltage from the output to other parts of the differential amplifier and can greatly reduce the input-referred offset voltage without extra power consumption. A 1.8V CMOS differential amplifier is implemented in 0.18μm CMOS process using the proposed technique. The simulation results show that the technique could reduce the input-referred offset voltage of the amplifier by 40% with a 20% load transistor mismatch and a 10% input differential transistor mismatch. Moreover, the proposed technique consumes the least power and achieves the highest integration among various offset-cancellation techniques.

High Performance VHF Power VDMOSFETs for Low Voltage Applications

A high performance VHF power VDMOSFET,ap plying to the mobile communications,is developed,which can deliver an output power of 12W with the drain efficiency of 70% as well as the gain of 12dB at a low supply voltage of 12V and 175MHz.It is fabricated by using the terraced gat e structure and refractory molybdenum (Mo) gate technology.

A Low-Voltage,High Efficiency Power Generation Structure for UHF RFID

This paper presents a new power generation structure that can provide DC energy for passive UHF RFID with high sensitivity and high efficiency. The structure is designed with 0.18μm standard CMOS technology, including two charge pumps,a current reference, and a group of bias circuits. Low-voltage performance is improved thanks to the bias structure,which eliminates the threshold voltage drop and body-effect of conventional circuits. A 350mV minimum input level is required to generate a 1.5V power supply for a 100k~ load with power conversion efficiency （PCE） of 22%. PCE up to 29.8% is achieved with a 60kΩ load. Simulation results show that the new circuit is superior to conventional charge pumps.

A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers

This paper presents a low-voltage low-power variable gain amplifier,which is applied in the automatic gain control loop of a super heterodyne receiver. Six stages are cascaded to provide an 81dB digitally controlled gain range in a 3dB step. The gain step error is less than 0.5dB. It operates at an intermediate frequency of 300kHz, and the power consumption is 1.35mW from a 1.8V supply. The prototype chip is implemented in a TSMC＇s 0.18μm 1P6M CMOS process and occupies approximately 0.24mm^2 . It is very suitable for portable wire- less communication systems. The measurement results agree well with the system requirements.

A Low Voltage,Low Power RF/Analog Front-End Circuit for Passive UHF RFID Tags

This paper presents a low voltage, low power RF/analog front-end circuit for passive ultra high frequency （UHF） radio frequency identification （RFID） tags. Temperature compensation is achieved by a reference generator using sub-threshold techniques. The chip maintains a steady system clock in a temperature range from - 40 to 100℃. Some novel building blocks are developed to save system power consumption,including a zero static current power-on reset circuit and a voltage regulator. The RF/analog front-end circuit is implemented with digital base-band and EEPROM to construct a whole tag chip in 0. 18μm CMOS EEPROM technology without Schottcky diodes. Measured results show that the chip has a minimum supply voltage requirement of 0.75V. At this voltage, the total current consumption of the RF/analog frontend circuit is 4.6μA.

Self-Aligned InGaP/GaAs Power HBTswith a Low Bias Voltage

A self aligned InGaP/GaAs power HBTs for L band power amplifier with low bias voltage are described.Base emitter metal self aligning,air bridge,and wafer thinning are used to improve microwave power performance.A power HBT with double size of emitter of (3μm×15μm)×12 is fabricated.When the packaged HBT operates in class AB at a collector bias of 3V,a maximum 23dBm output power with 45% power added efficiency is achieved at 2GHz.The results show that the InGaP/GaAs power HBTs have great potential in mobile communication systems operating at low bias voltage.

Study on the instantaneous protection reliability of low voltage circuit breakers

This paper outlines the significance of enhancing the instantaneous protection reliability of low voltage circuit breakers and describes their main failure modes. The instantaneous failure mechanism of low voltage circuit breakers was analyzed so that measures to improve instantaneous protection reliability can be determined. Furthermore, the theory of the instantaneous characteristics calibration device for low voltage circuit breakers and the method of eliminating the non-periodic component of test current are given in detail. Finally, the test results are presented.

Key technologies for medium and low voltage DC distribution system

Development of the medium and low voltage DC distribution system is of great significance to a regional transmission of electric energy,increasing a penetration rate of new energy,and enhancing a safety of the operation of the AC/DC interconnected grid.This paper first summarizes the medium and low voltage DC distribution system schemes and plans put forward by many countries,and then elaborate status of under-construction medium and low voltage DC distribution system project cases in China.Based on these project cases,this paper analyzes key issues involved in the medium and low voltage DC distribution system topologies,equipment,operation control technologies and DC fault protections,in order to provide theoretical and technical reference for future medium and low voltage DC distribution system-related projects.Finally,this paper combines a current China research status to summarize and give a prediction about the future research direction of medium and low voltage DC distribution system,which can provide reference for the research of medium and low voltage DC distribution system.

Boosting of reversible capacity delivered at a low voltage below 0.5 V in mildly expanded graphitized needle coke anode for a high-energy lithium ion battery

The rate performance and cycle stability of graphitized needle coke(GNC)as anode are still limited by the sluggish kinetics and volume expansion during the Li ions intercalation and de-intercalation process.Especially,the output of energy density for lithium ion batteries(LIBs)is directly affected by the delithiation capacity below 0.5 V.Here,the mildly expanded graphitized needle coke(MEGNC)with the enlarged interlayer spacing from 0.346 to 0.352 nm is obtained by the two-step mild oxidation intercalation modification.The voltage plateau of MEGNC anode below 0.5 V is obviously broadened as compared to the initial GNC anode,contributing to the enhancement of Li storage below the low voltage plateau.Moreover,the coin full cell and pouch full cell configured with MEGNC anode exhibit much enhanced Li storage ability,energy density and better cycling stability than those full cells configured with GNC and commercial graphite anodes,demonstrating the practical application value of MEGNC.The superior anode behaviors of MEGNC including the increased effective capacity at low voltage and superior cyclic stability are mainly benefited from the enlarged interlayer spacing,which not only accelerates the Li ions diffusion rate,but also effectively alleviates the volume expansion and fragmentation during the Li ions intercalation process.In addition,the above result is further confirmed by the density functional theory simulation.This work provides an effective modification strategy for the NC-based graphite to enhance the delithiation capacity at a low voltage plateau,dedicated to improving the energy density and durability of LIBs.

High performance InAlN/GaN high electron mobility transistors for low voltage applications

A high performance InAlN/GaN high electron mobility transistor(HEMT)at low voltage operation(6-10 V drain voltage)has been fabricated.An 8 nm InAlN barrier layer is adopted to generate large 2DEG density thus to reduce sheet resistance.Highly scaled lateral dimension(1.2μm source-drain spacing)is to reduce access resistance.Both low sheet resistance of the InAlN/GaN structure and scaled lateral dimension contribute to an high extrinsic transconductance of 550 mS/mm and a large drain current of 2.3 A/mm with low on-resistance(Ron)of 0.9Ω·mm.Small signal measurement shows an fT/fmax of 131 GHz/196 GHz.Large signal measurement shows that the InAlN/GaN HEMT can yield 64.7%-52.7%(Vds=6-10 V)power added efficiency(PAE)associated with 1.6-2.4 W/mm output power density at 8 GHz.These results demonstrate that GaN-based HEMTs not only have advantages in the existing high voltage power and high frequency rf field,but also are attractive for low voltage mobile compatible rf applications.

A novel low-voltage high precision current reference based on subthreshold MOSFETs

A novel topology low-voltage high precision current reference based on subthreshold Metal-Oxide-Semiconductor Field Effect Transistors （MOSFETs） is presented. The circuit achieves a temperature-independent reference current by a proper combination current of two first-order temperature-compensation current references, which exploit the temperature characteristics of integrated poly2 resistors and the 1- V transconductance characteristics of MOSFET operating in the subthreshold region. The circuit, designed with the 1 st silicon 0.35 μm standard CMOS logic process technology, exhibits a stable current of about 2.25 μA with much low temperature coefficient of 3 × 10^-4μA/℃ in the temperature range of-40-150 ℃ at 1 V supply voltage, and also achieves a better power supply rejection ratio （PSRR） over a broad frequency. The PSRR is about -78 dB at DC and remains -42 dB at the frequency higher than 10 MHz. The maximal process error is about 6,7% based on the Monte Carlo simulation. So it has good process compatibility.

Research on arc erosion of silver-based alloy contact materials under low voltage,resistive load and small current at 400 Hz and 50 Hz

By using a self-developed IF power and a ASTM contact material experimental system of small-capacity and variable frequency,the value of arcing characteristics and the welding force of the silver-based contact material are acquired under low voltage,resistive load and small current at 400 Hz and 50 Hz. By means of an electricity-ray analytical balance,SEM and EDAX,the weighing values of the contact materials and the changes of AgCdO,AgNi,AgC and AgW contact material surface profile and micro-area constituent are obtained and analyzed. The arc erosion causes of silver-based alloy contact materials at 400 Hz and 50 Hz are also discussed.

1.0 V low voltage CMOS mixer based on voltage control load technique

A CMOS active mixer based on voltage control load technique which can operate at 1.0 V supply voltage was proposed, and its operation principle, noise and linearity analysis were also presented. Contrary to the conventional Gilbert-type mixer which is based on RF current-commutating, the load impedance in this proposed mixer is controlled by the LO signal, and it has only two stacked transistors at each branch which is suitable for low voltage applications. The mixer was designed and fabricated in 0.18 tam CMOS process for 2.4 GHz ISM band applications. With an input of 2.44 GHz RF signal and 2.442 GHz LO signal, the measurement specifications of the proposed mixer are： the conversion gain （Gc） is 5.3 dB, the input-referred third-order intercept point （PIIP3） is 4.6 dBm, the input-referred 1 dB compression point （P1dB） is --7.4 dBm, and the single-sideband noise figure （NFSSB） is 21.7 dB.