Design and performance of a high-speed and low-noise preamplifier for SiPM

Considering the R&D for upgrading the K^(0)_(L) andμdetectors in the Belle II experiment using a scintillator and silicon pho-tomultiplier(SiPM),we designed a compact high-speed and low-noise preamplifier.The preamplifier demonstrated a good gain stability,bandwidth of 426 MHz,baseline noise level ofσ≈0.6 mV,dynamic range of up to170 mV of the input signal amplitude,good time resolution of 20 ps,and it can be comprehensively applied to SiPMs.Adopting pole-zero-cancelation in the preamplifier reduces both the rise and fall times of the SiPM signal,which can significantly improve the time resolution and reduce the pile-up when using a large SiPM or an array of SiPMs.Various combinations of the preamplifier and several types of SiPMs demonstrated time resolutions better than 50 ps for most cases;when the number of detected photons was larger than 60,a time resolution of approximately 25 ps was achieved.

Design and Test of a CMOS Low Noise Amplifier in Bluetooth Transceiver

A RF low noise amplifier,integrated in a single bluetooth transceiver chip and fabricated in 0.35μm digital CMOS technology,is presented.Under the consideration of ESD protection and package,design methodology is discussed from the aspects of noise optimization,impedance match,and forward gain.At 2.05GHz,the measured S 11 is -6.4dB, S 21 is 11dB with 3dB-BW of 300MHz,and NF is about 5.3dB.It indicates that comprehensive consideration of parasitics,package model,and reasonable process is necessary for RF circuit design.

OPTIMIZATION DESIGN METHOD FOR INPUT IMPEDANCE MATCHING NETWORK OF LOW NOISE AMPLIFIER

According to the theories of optimal noise match and optimal power match, a method for calculating the optimal source impedance of low noise amplifier （LNA） is proposed based on the input reflection coefficient S11. Moreover.with the help of Smith chart, the calculation process is detailed, and the trade-off between the lowest noise figure and the maximum power gain is obtained during the design of LNA input impedance matching network. Based on the Chart 0. 35-μm CMOS process, a traditional cascode LNA circuit is designed and manufactured. Simulation and experimental results have a good agreement with the theoretical analysis, thus proving the correctness of theoretical analysis and the feasibility of the method.

Design of Low-Voltage Low Noise Amplifiers with High Linearity

A CMOS radio frequency low noise amplifier with high linearity and low operation voltage of less than 1.0V is presented.In this circuit,an auxiliary MOSFET in the triode region is used to boost the linearity.Simulation shows that this method can boost the input-referred 3rd-order intercept point with much less power dissipation than that of traditional power/linearity tradeoff solution which pays at least 1dB power for 1dB linearity improvement.It is also shown that the size of the common-gate PMOS transistor needs to be optimized to reduce its loaded input impedance so as not to degrade the linearity due to high voltage gain at its source terminal.The simulation is carried out with TSMC 0.18μm RF CMOS technology and SpectreRF.

A Wide-Band Low Noise Amplifier for Terrestrial and Cable Receptions

We present the design of a wide-band low-noise amplifier （LNA） implemented in 0.35μm SiGe BiCMOS technology for cable and terrestrial tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, the LNA achieves 0.1 ～ 1GHz wide bandwidth and 18. 8dB gain with less than 1.4dB of gain variation. The noise figure of the wideband LNA is 5dB, and its 1dB compression point is - 2dBm and IIP3 is 8dBm. The LNA dissipates 120mW of power with a 5V supply.

Research on the Effect of High Power Microwave on Low Noise Amplifier and Limiter Based on the Injection Method

The reliability of electronic device is threatened in high power microwave (HPM) environment. In accordance with the situation that the emulation is ineffective in evaluating the accuracy and precision of the HPM effect to electronic device, the experimental method is used to resolve the problem. Low Noise Amplifier (LNA) and Limiter are selected as the objects for the experiments, the structural characteristic of the front-end of radar receiver is described, the phenomena and criterion are elaborated and analyzed using injection method due to its ability to get an accurate threshold avoiding the complex coupling, the basic principle of injection experiment is demonstrated, and the method and process of effect experiment about Low Noise Amplifier and Limiter are also explained. The experimental system is established, and the system is composed of low power microwave source such as TWT, test equipment for obtaining the effect parameters, and some of auxiliary equipments as camera, optical microscope or electron microscopy, attenuator, detector, and directional coupler etc. The microwave delivered from source is adjusted to the power infused by attenuator, and pour in the decanting point of effecter via directional coupler, then the couple signal created by directional coupler is input to the recording instrument after detecting by detector, finally the power of effecter is obtained. The value of power, which damages the effecter in the microwave pulse environment, is classified at the index of sensitivity, and the threshold is obtained by power diagnose and wave test. Some regular understandings of the HPM effect to electronic device are obtained based on the results of the experiments. It turns out that the index of electronic device is influenced significantly by the energy via front door coupling, the MOSFET made up of GaAs is the most wearing part to HPM in LNA, the damage threshold of LNA is about 40dBm under single pulse while in repetitive pulse the value is from 33.3dBm to 43.9dBm according to different wave band. The damage threshold of Limiter is about 56dBm to80dBm.

DESIGN AND ANALYSIS OF INTEGRATED OPERATIONAL AMPLIFIER XD1531 WITH LOW NOISE AT LOW FREQUENCIES

Principles of design are described for the low frequency integrated operationalamplifler XD1531 with low noise. The procedures of design of both the circuit structure and the tran-sistor shape are considered. The first stage of the circuit is designed with the methods of low noise atlow frequencies. The measures which decrease noises, especially, the 1/f noise originating .from thesemiconductor surface state and defects, are used for the transistor structure design. With analysisand comparison to products here and abroad in characteristics, it is shown that XD1531 has a lowernoise index at low frequencies than others, and the effectiveness of design methods for bringing lownoises have been demonstrated.

Design and analysis on four stage SiGe HBT low noise amplifier

Focusing on the linearity shortcoming on a bipolar low noise amplifier(LNA),a new 6 ~14GHz four stage SiGe HBT LNA is proposed.This amplifier adopts a method of gain allocation on multiple stages to avoid the limitation on linearity especially with the addition of negative gain on the third stage.To realize gain flatness,extra zero is introduced to compensate the gain roll-off formed by pole,and local shunt-shunt negative feedback is used to widen the bandwidth as well as optimize circuit' s noise.Simulated results have shown that in 6 ~14GHz,this circuit achieves noise figure(NF) less than 3dB,gain of 17.8dB(+0.2dB),input and output reflection parameters of less than- 10 dB,and the K factor is above 1.15.

3 - 10 GHz Ultra-Wideband Low-Noise Amplifier Using Inductive-Series Peaking Technique with Cascode Common-Source Circuit

The objective of this paper is to investigate a ultra-wideband (UWB) low noise amplifier (LNA) by utilizing a two-stage cascade circuit schematic associated with inductive-series peaking technique, which can improve the bandwidth in the 3-10 GHz microwave monolithic integrated circuit (MMIC). The proposed UWB LNA amplifier was implemented with both co-planer waveguide (CPW) layout and 0.15-μm GaAs D-mode pHEMT technology. Based on those technologies, this proposed UWB LNA with a chip size of 1.5 mm x 1.4 mm, obtained a flatness gain 3-dB bandwidth of 4 - 8 GHz, the constant gain of 4 dB, noise figure lower than 5 dB, and the return loss better than –8.5 dB. Based on our experimental results, the low noise amplifier using the inductive-series peaking technique can obtain a wider bandwidth, low power consumption and high flatness of gain in the 3 - 10 GHz. Finally, the overall LNA characterization exhibits ultra-wide bandwidth and low noise characterization, which illustrates that the proposed UWB LNA has a compact size and favorable RF characteristics. This UWB LNA circuit demonstrated the high RF characterization and could provide for the low noise micro-wave circuit applications.

Low Phase Noise and Wide Tuning Range VCO Using the MOS Differential Amplifier with Active Load

We demonstrate the design of a novel voltage-controlled oscillator (VCO), which is based on a metal-oxide-semiconductor field-effect transistor (MOS) differential amplifier with active load. This VCO achieves low phase noise and wide tuning range. The phase noise is –120 dBc/Hz at 600 KHz offset from a 1.216 GHz carrier frequency. This value is comparable to that of a LC-based integrated oscillator. The operating frequency can be tuned from 117 MHz to 1.216 GHz with the supply voltage varying from 1.3 V to 3.3 V. Therefore, the tuning range is about 90.38% which is larger than most of the LC and ring oscillator. The VCO circuit, which is constructed using a standard 0.35 μm CMOS technology, occupies only 26.25 × 7.52 μm2 die area and dissipated 10.56 mW under a 3.3 V supply voltage.

A 400 MHz Low Noise Amplifier at Cryogenic Temperature for Superconductor Filter System

A cryogenic low noise amplifier （LNA） using Agilent high electron mobility transistor （HEMT） for 380 MHzto 480 MHz is designed and fabricated, and the excellent cryogenic performance in superconducting receiver front-end for communication system is achieved. A special input impedance matching topology is implemented to provide low noise figure （NF） and good input matching in this cryogenic LNA design. The measurement results show that the NF is within 0.25 dB from the minimum NF of a single transistor, the power gain is above 20 dB, the flatness is within 1 dB, and the maximum input return loss is lower than -20 dB in bandwidth.

A low noise charge sensitive preamplifier with switch control feedback resistance

In this paper, the design and analysis of a new low noise charge sensitive preamplifier for silicon strip, Si(Li), CdZnTe and CsI detectors etc. with switch control feedback resistance were described, the entire system to be built using the CMOS transistors. The circuit configuration of the CSP proposed in this paper can be adopted to develop CMOS-based Application Specific Integrated Circuit further for Front End Electronics of read-out system of nuclear physics, particle physics and astrophysics research, etc. This work is an implemented design that we succeed after a simulation to obtain a rise time less than 3ns, the output resistance less than 94? and the linearity almost good.

Inductorless CMOS Low Noise Amplifier for Multiband Application in 0.1–1.2 GHz

A 0.18 μm CMOS low noise amplifier(LNA) by utilizing noise-canceling technique was designed and implemented in this paper. Current-reuse and self-bias techniques were used in the first stage to achieve input matching and reduce power consumption. The core size of the proposed CMOS LNA circuit without inductor was only 128 μm 9226 μm. The measured power gain and noise figure of the proposed LNA were 20.6 and 1.9 dB,respectively. The 3-dB bandwidth covers frequency from 0.1 to 1.2 GHz. When the chip was operated at a supply voltage of 1.8 V, it consumed 25.69 mW. The high performance of the proposed LNA makes it suitable for multistandard low-cost receiver front-ends within the above frequency range.

Radio Frequency Low Noise Amplifier with Linearizing Bias Circuit

A 1.34 GHz-1=60 MHz low noise amplifier （LNA） designed in a 0.35 pm SiGe process is presented. The designed LNA exhibits a power gain of 21.46 dB and a noise figure （NF） of 1.27 dB at 1.34 GHz. The linearity is improved with an active biasing technique. The post-layout simulation shows an input referred 1-dB compression point （IPldn） of-11.52 dBm. Compared with the recent reported high gain LNAs, the proposed LNA has a much better linearity without degrading other performance. The LNA draws 10 mA current from a 3.3 V power supply.

A NOVEL Ku-BAND LOW NOISE AMPLIFIER WITH HEMT AND GaAs MMIC

A novel Ku-band low noise amplifier with a high electron mobility transistor (HEMT)and a GaAs monolithic microwave integrated circuit (MMIC) has been demonstrated. Its noisefigure is less-than 1.9dB with an associated gain larger than 27dB and an input/output VSWRless than 1.4 in the frequency range of 11.7-12.2GHz. The HEMT and the microwave series in-ductance feedback technique are used in the first stage of the amplifier, and a Ku-band MMIC isemployed in the last stage. The key to this design is to achieve an optimum noise match and a min-imum input VSWR matching simultaneously by using the microwave series inductance feedbackmethod. The B J-120 waveguides are used in both input and output of the amplifier.

Cryogenic amplifier with low input-referred voltage noise calibrated by shot noise measurement

A low-noise cryogenic amplifier for the bandwidth from 100 kHz to 2 MHz with commercially available components is presented. The amplifier is mounted on the cold finger of our home-made liquid helium dipstick. The input imp√edance of the amplifier is 2 k？. The input-referred voltage noise of the amplifier at approximately 2 MHz is around 1 n V/Hz^（1/2）. We demonstrate the performance of the amplifier by measuring shot noise on the Al/AlOx/Al tunneling junction with resistance about 17 k？ at liquid helium temperature.

A 9 - 10.6 GHz Microstrip Antenna—UWB Low Noise Amplifier with Differential Noise Canceling Technique for IoT Applications

An ultra-wide band (UWB) receiver front-end that operates at the UWB frequency range, starting from 9 GHz - 10.6 GHz is proposed in this paper. The proposed system consists of an off-chip microstrip antenna and CMOS differential low noise amplifier with a differential noise canceling (DNC) technique. The proposed antenna is trapezoidal dipole shaped with balun and printed on a low-cost FR4 substrate with dimensions 10 × 10 × 0.8 mm3. The balun circuit integrated with the ground antenna to improve the antenna impedance matching. Noise canceling is obtained by using a differential block with each stage having 2 amplifiers that generate differential signals, subtracted to improve total noise performance. The proposed DNC block improves NF by 50% while increasing total power consumption with only 0.1 Mw. The differential CMOS cascode LNA with DNC block is implemented using UMC 0.13 μm CMOS process, exhibits a flat gain of 19 dB, maximum noise figure of 2.75 dB, 1 dB compression point −16 dBm and 3rd order intercept point (IIP3) −10 dBm. The proposed system has total DC power consumption of 2.8 mW at 1.2 V power supply.

Analysis, Design and Implementation of SiGe Wideband Dual-Feedback Low Noise Amplifier

A wideband dual-feedback low noise amplifier （LNA） was analyzed, designed and implemented using SiGe heterojunction bipolar transistor （HBT） technology. The design analysis in terms of gain, input and output matching, noise and poles for the amplifier was presented in detail. The area of the complete chip die, including bonding pads and seal ring, was 655 μm × 495 μm. The on-wafer measurements on the fabricated wideband LNA sample demonstrated good performance： a small-signal power gain of 33 dB with 3-dB bandwidth at 3.3 GHz was achieved; the input and output return losses were better than - 10 dB from 100 MHz to 4 GHz and to 6 GHz, respectively; the noise figure was lower than 4.25 dB from 100 MHz to 6 GHz; with a 5 V supply, the values of OPtdB and OIP3 were 1.7 dBm and 11 dBm at 3-dB bandwidth, respectively.

Low Noise Amplifier Design for Digital Television Applications

The DVB-T (Digital Video Broadcasting—Terrestrial) standard is being deployed in many parts of the world for digital broadcasting services, providing a variety of features extending the capabilities of the older analog ones. In this paper, a two-stage low noise amplifier (LNA) is designed for use with the DVB-T standard. The design is employed based on microstrip. The microwave design meets all the specifications required, achieving input and output return loss below ?10 dB, high gain of 35 dB and high linearity. Low noise figure of 1.3 dB is achieved with the use of pHEMT transistor technology.

An X-Band Low Noise Amplifier Design for Marine Navigation Radars

In this paper, the design of a 9.1 GHz Low Noise Amplifier (LNA) of a RADAR receiver that is used in the Navy is presented. For the design of the LNA, we used GaAs Field-Effect Transistors (FETs) from Agilent ADS component library. In order to keep the cost of the circuit in low prices and the performance high, we design a two-stage LNA.