In the digital low level RF （LLRF） system of a circular （particle） accelerator, the RF field signal is usually down converted to a fixed intermediate frequency （IF）. The ratio of IF and sampling frequency determ...In the digital low level RF （LLRF） system of a circular （particle） accelerator, the RF field signal is usually down converted to a fixed intermediate frequency （IF）. The ratio of IF and sampling frequency determines the processing required, and differs in various LLRF systems. It is generally desirable to design a universally compatible architecture for different IFs with no change to the sampling frequency and algorithm. A new RF detection method based on a double heterodyne architecture for wide IF range has been developed, which achieves the high accuracy requirement of modern LLRF. In this paper, the relation of IF and phase error is systematically analyzed for the first time and verified by experiments. The effects of temperature drift for 16 h IF detection are inhibited by the amplitude and phase calibrations.展开更多
This paper presents an improved merged architecture for a low-IF GNSS receiver frontend,where the bias current and functions are reused in a stacked quadrature LNA-mixer-VCO.Only a single spiral inductor is implemente...This paper presents an improved merged architecture for a low-IF GNSS receiver frontend,where the bias current and functions are reused in a stacked quadrature LNA-mixer-VCO.Only a single spiral inductor is implemented for the LC resonator and an extra 1/2 frequency divider is added as the quadrature LO signal generator. The details of the design are presented.The gain plan and noise figure are discussed.The phase noise,quadrature accuracy and power consumption are improved.The test chip is fabricated though a 0.18μm RF CMOS process. The measured noise figure is 5.4 dB on average,with a gain of 43 dB and a IIP3 of-39 dBm.The measured phase noise is better than -105 dBc/Hz at 1 MHz offset.The total power consumption is 19.8 mW with a 1.8 V supply. The experimental results satisfy the requirements for GNSS applications.展开更多
文摘In the digital low level RF （LLRF） system of a circular （particle） accelerator, the RF field signal is usually down converted to a fixed intermediate frequency （IF）. The ratio of IF and sampling frequency determines the processing required, and differs in various LLRF systems. It is generally desirable to design a universally compatible architecture for different IFs with no change to the sampling frequency and algorithm. A new RF detection method based on a double heterodyne architecture for wide IF range has been developed, which achieves the high accuracy requirement of modern LLRF. In this paper, the relation of IF and phase error is systematically analyzed for the first time and verified by experiments. The effects of temperature drift for 16 h IF detection are inhibited by the amplitude and phase calibrations.
基金Project supported by the National Natural Science Foundation of China(No.61076101)
文摘This paper presents an improved merged architecture for a low-IF GNSS receiver frontend,where the bias current and functions are reused in a stacked quadrature LNA-mixer-VCO.Only a single spiral inductor is implemented for the LC resonator and an extra 1/2 frequency divider is added as the quadrature LO signal generator. The details of the design are presented.The gain plan and noise figure are discussed.The phase noise,quadrature accuracy and power consumption are improved.The test chip is fabricated though a 0.18μm RF CMOS process. The measured noise figure is 5.4 dB on average,with a gain of 43 dB and a IIP3 of-39 dBm.The measured phase noise is better than -105 dBc/Hz at 1 MHz offset.The total power consumption is 19.8 mW with a 1.8 V supply. The experimental results satisfy the requirements for GNSS applications.
