Local charge neutrality condition,Fermi level and majority carrier density of a semiconductor with multiple localized multi-level intrinsic/impurity defects

For semiconductors with localized intrinsic/impurity defects, intentionally doped or unintentionally incorporated, that have multiple transition energy levels among charge states, the general formulation of the local charge neutrality condition is given for the determination of the Fermi level and the majority carrier density. A graphical method is used to illustrate the solution of the problem. Relations among the transition energy levels of the multi-level defect are derived using the graphical method. Numerical examples are given for p-doping of the CdTe thin film used in solar panels and semi-insulating Si to illustrate the relevance and importance of the issues discussed in this work.

Electric gating of the multichannel conduction in LaAlO_(3)/SrTiO_(3) superlattices

The electric gating on the transport properties of two-dimensional electron gas(2DEG) at the interface of LaAlO_(3)/SrTiO_(3)(LAO/STO) heterostructure has attracted great research interest due to its potential application in fieldeffect devices. Most of previous works of gate effect were focused on the LAO/STO heterostructure containing only one conductive interface. Here, we systematically investigated the gate effect on high-quality LAO/STO superlattices(SLs)fabricated on the TiO_(2)-terminated(001) STO substrates. In addition to the good metallicity of all SLs, we found that there are two types of charge carriers, the majority carriers and the minority carriers, coexisting in the SLs. The sheet resistance of the SLs with a fixed thickness of the LAO layer increases monotonically as the thickness of the STO layer increases. This is derived from the dependence of the minority carrier density on the thickness of STO. Unlike the LAO/STO heterostructure in which minority and majority carriers are simultaneously modulated by the gate effect, the minority carriers in the SLs can be tuned more significantly by the electric gating while the density of majority carriers is almost invariable. Thus, we consider that the minority carriers may mainly exist in the first interface near the STO substrate that is more sensitive to the back-gate voltage, and the majority carriers exist in the post-deposited STO layers. The SL structure provides the space separation for the multichannel conduction in the 2 DEG, which opens an avenue for the design of field-effect devices based on LAO/STO heterostructure.