A progressive surrogate gradient learning for memristive spiking neural network

In recent years, spiking neural networks(SNNs) have received increasing attention of research in the field of artificial intelligence due to their high biological plausibility, low energy consumption, and abundant spatio-temporal information.However, the non-differential spike activity makes SNNs more difficult to train in supervised training. Most existing methods focusing on introducing an approximated derivative to replace it, while they are often based on static surrogate functions. In this paper, we propose a progressive surrogate gradient learning for backpropagation of SNNs, which is able to approximate the step function gradually and to reduce information loss. Furthermore, memristor cross arrays are used for speeding up calculation and reducing system energy consumption for their hardware advantage. The proposed algorithm is evaluated on both static and neuromorphic datasets using fully connected and convolutional network architecture, and the experimental results indicate that our approach has a high performance compared with previous research.

Pulse coding off-chip learning algorithm for memristive artificial neural network

Memristive neural network has attracted tremendous attention since the memristor array can perform parallel multiplyaccumulate calculation(MAC)operations and memory-computation operations as compared with digital CMOS hardware systems.However,owing to the variability of the memristor,the implementation of high-precision neural network in memristive computation units is still difficult.Existing learning algorithms for memristive artificial neural network(ANN)is unable to achieve the performance comparable to high-precision by using CMOS-based system.Here,we propose an algorithm based on off-chip learning for memristive ANN in low precision.Training the ANN in the high-precision in digital CPUs and then quantifying the weight of the network to low precision,the quantified weights are mapped to the memristor arrays based on VTEAM model through using the pulse coding weight-mapping rule.In this work,we execute the inference of trained 5-layers convolution neural network on the memristor arrays and achieve an accuracy close to the inference in the case of high precision(64-bit).Compared with other algorithms-based off-chip learning,the algorithm proposed in the present study can easily implement the mapping process and less influence of the device variability.Our result provides an effective approach to implementing the ANN on the memristive hardware platform.

Direct laser writing of graphene oxide for ultra-low power consumption memristors in reservoir computing for digital recognition

A memristor is a promising candidate of new electronic synaptic devices for neuromorphic computing.However,conventional memristors often exhibit complex device structures,cumbersome manufacturing processes,and high energy consumption.Graphene-based materials show great potential as the building materials of memristors.With direct laser writing technology,this paper proposes a lateral memristor with reduced graphene oxide(rGO)and Pt as electrodes and graphene oxide(GO)as function material.This Pt/GO/rGO memristor with a facile lateral structure can be easily fabricated and demonstrates an ultra-low energy consumption of 200 nW.Typical synaptic behaviors are successfully emulated.Meanwhile,the Pt/GO/rGO memristor array is applied in the reservoir computing network,performing the digital recognition with a high accuracy of 95.74%.This work provides a simple and low-cost preparation method for the massive production of artificial synapses with low energy consumption,which will greatly facilitate the development of neural network computing hardware platforms.