Security Vulnerabilities in Microprocessors

Microprocessors such as those found in PCs and smartphones are complex in their design and nature.In recent years,an increasing number of security vulnerabilities have been found within these microprocessors that can leak sensitive user data and information.This report will investigate microarchi­tecture vulnerabilities focusing on the Spectre and Meltdown exploits and will look at what they do,how they do it and,the real-world impact these vulnerabilities can cause.Additionally,there will be an introduction to the basic concepts of how several PC components operate to support this.

SF VECTOR CONTROL SYSTEM WITH TWO SINGLE CHIP MICROPROCESSORS

This paper introduces a SF vector control system of a slip frequency controlled induction mo-tor with simple structure,fair performance and convenient operation.It is realized by two singlechip microprocessors and fed from SPWM-GTR inverter.The whole system is combined by twosubsystems,both of them are 8031 single chip microprocessors.The communication between themis coordinated by the full duplex serial port within the chip and ask-and-answer communicationmanner.The error-corrected means adopted has improved the operation reliability of the system.A series of experimental results on a 3 kW induction motor are given at the end of this paper.

On-line Cache Resizing for Low-Power Microprocessors

We propose a novel scheme, called on-line cache resizing （OCR）, to dynamically resize the cache and meet the size requirement of each application. At each periodic interval, the scheme gathers the cache hit-miss statistics at runtime using an extra tag array. These executing statistics serve as inputs to an analytical model of cache energy. The scheme uses energy as a primary metric to dynamically increase/decrease the number of active cache ways for the next interval. The scheme minimizes the active cache size to save energy with minimal performance loss. The simulation with SPEC 2000 benchmarks shows that OCR results in an average of 38.4% energy saving compared with fixed-size caches, with only 2.0% performance loss.

Can Giant Microchips Become a Big Deal?

For decades,manufacturers have boasted about how small they can make microchip components.Transistors have shrunk by about 1000-fold over the last 50 years,for example[1].But Cerebras Systems,Inc.of Sunnyvale,CA,USA takes pride in how big its chips are.Produced from a single silicon wafer,its Wafer-Scale Engine(WSE)-2 chips measure 46225 mm^(2),56 times the size of a standard Nvidia microprocessor(Fig.1)[2].

A Framework for Driver DrowsinessMonitoring Using a Convolutional Neural Network and the Internet of Things

One of the major causes of road accidents is sleepy drivers.Such accidents typically result in fatalities and financial losses and disadvantage other road users.Numerous studies have been conducted to identify the driver’s sleepiness and integrate it into a warning system.Most studies have examined how the mouth and eyelids move.However,this limits the system’s ability to identify drowsiness traits.Therefore,this study designed an Accident Detection Framework(RPK)that could be used to reduce road accidents due to sleepiness and detect the location of accidents.The drowsiness detectionmodel used three facial parameters:Yawning,closed eyes(blinking),and an upright head position.This model used a Convolutional Neural Network(CNN)consisting of two phases.The initial phase involves video processing and facial landmark coordinate detection.The second phase involves developing the extraction of frame-based features using normalization methods.All these phases used OpenCV and TensorFlow.The dataset contained 5017 images with 874 open eyes images,850 closed eyes images,723 open-mouth images,725 closed-mouth images,761 sleepy-head images,and 1084 non-sleepy head images.The dataset of 5017 images was divided into the training set with 4505 images and the testing set with 512 images,with a ratio of 90:10.The results showed that the RPK design could detect sleepiness by using deep learning techniques with high accuracy on all three parameters;namely 98%for eye blinking,96%for mouth yawning,and 97%for head movement.Overall,the test results have provided an overview of how the developed RPK prototype can accurately identify drowsy drivers.These findings will have a significant impact on the improvement of road users’safety and mobility.

High Performance General-Purpose Microprocessors： Past and Future

It can be observed from looking backward that processor architecture is improved through spirally shifting from simple to complex and from complex to simple. Nowadays we are facing another shifting from complex to simple, and new innovative architecture will emerge to utilize the continuously increasing transistor budgets. The growing importance of wire delays, changing workloads, power consumption, and design/verification complexity will drive the forthcoming era of Chip Multiprocessors （CMPs）. Furthermore, typical CMP projects both from industries and from academics are investigated. Through going into depths for some primary theoretical and implementation problems of CMPs, the great challenges and opportunities to future CMPs are presented and discussed. Finally, the Godson series microprocessors designed in China are introduced.

Experimental research on transient radiation effects in microprocessors based on SPARC-V8 architecture

An experimental system is developed for the transient radiation effects testing of an anti-radiation hardened processor. Based on this system, the transient radiation effects in a microprocessor based on SPARC-V8 architecture was investigated. The dose-rate-soft-error index parameters of the processor were determined according to the test results, as were the influences on the function and timing parameters of the processor. The power supply balance is affected, which caused the system to reset and be the main source of soft errors. The results showed the circuit recovery time is primarily determined by the internal PLL, while the core power and the output-low-IO ports are more sensitive to the transient dose rate effect. The power-integrity-hardened design is proposed to mitigate the transient radiation effect.

MICROPROCESSOR BASED MODEL FOLLOWING ADAPTIVE CONTROL SYSTEM FOR CSIM DRIVES

A model following adaptive control system for CSIM is presented in this paper. A dynamic mathematical model of slip control based system is obtained. With the help of model reducing technique, full order model is reduced to simplify the design without degrading much of the performance. Model following adaptive control laws in discrete form are derived. These laws satisfy the hyperstability condition for taking care of the load and machine parameter changes of the drive. A microprocessor 8098 is used to develop the speed controller. The implementation of the control system uses only available variables of the reference model and the controlled plant. Experimental results are given to demonstrate the good performance of the system.

SIMULATION AND PERFORMANCE ANALYSIS OF NETWORK ON CHIP ARCHITECTURES

The network on chip（NoC）is used as a solution for the communication problems in a complex system on chip（SoC）design.To further enhance performances,the NoC architectures,a high level modeling and an evaluation method based on OPNET are proposed to analyze their performances on different injection rates and traffic patterns.Simulation results for general NoC in terms of the average latency and the throughput are analyzed and used as a guideline to make appropriate choices for a given application.Finally,a MPEG4 decoder is mapped on different NoC architectures.Results prove the effectiveness of the evaluation method.

Embedded Microcontrollers in Energy Conservation System

Energy conservation in homes has become important due to rising energy costs, increasing energy consumption, and a world-wide shift in concerns. This paper discusses an embedded home automation system that provides a method for monitoring and controlling household energy consuming devices. The hardware, software and system interface means utilized for implementation are presented and the particulars of the initial prototype are detailed.

Sampling and Reconstruction of Zero-Order Hold Signals by Parallel RC Filters

In this work we describe a reconstruction algorithm for zero-order hold (ZOH) waveforms measured by a parallel sam-pling scheme. In the method the ZOH signal is fed to a parallel network consisting of resistor-capacitor (RC) filters, whose outputs are sampled simultaneously. The algorithm reconstructs N previous samples of the input signal from output samples of N parallel RC circuits. The method is especially useful in sampling and reconstruction of the ZOH signals produced by the digital-to-analog converters. Using the parallel sampling method the sampling rate of the analog-to-digital converters can be increased by a factor of N. We discuss a variety of applications such as reconstruction of ZOH pulse sequences produced by ultra wide band (UWB) transmitters.

Increase the Quality of Life through the Development of Automation

This paper discusses needs for the automation of the underdevelopment communities.The novelty of this research is the link between production of microprocessors and increasing of the life quality.This study highlights the importance of efficient and economic architecture of logical circuits for the automation.The aim of this research is to produce a logical circuit,which includes suitable gates.The circuit will be embedded in the automatic devices as a microprocessor to cause programmed functions.This research reports analytically a workshop method to build the circuit.It uses an assembly card and required gates.Then,it suggests certain VHDL codes to drive a motor.The workshop presents the configuration schemes and connection board for every gate.In addition,it shows a schematic wiring diagram of the circuit.Finally,the economic analysis proves the mass production of the circuit will enhance the automation and consequently the quality of life.The outcome of this research is a helpful experience to the engineers,manufacturers and students of the relevant disciplines to resolve the inequality in the use of the modern technologies.

基于RTOS的CPU能耗控制技术研究

计算机制造技术的迅猛发展及嵌入式微处理器技术在无线通讯领域的应用,使能耗问题受到越来越多的关注。本文对造成处理器功耗上升的机理作了分析,介绍了当前三种具有代表性的处理器功率控制技术以及它们的具体实现,并通过仿真对其效果进行了比较,仿真结果表明基于soft real-time系统的功率控制技术可实现对功耗的有效控制。

Co-design for an SoC embedded network controller

With the development of Ethernet systems and the growing capacity of modem silicon technology, embedded communication networks are playing an increasingly important role in embedded and safety critical systems. Hardware/software co-design is a methodology for solving design problems in processor based embedded systems. In this work, we implemented a new 1-cycle pipeline microprocessor and a fast Ethemet transceiver and established a low cost, high performance embedded network controller, and designed a TCP/IP stack to access the Intemet. We discussed the hardware/software architecture in the forepart, and then the whole system-on-a-chip on Altera Stratix EP1S25F780C6 device. Using the FPGA environment and SmartBit tester, we tested the system＇s throughput. Our simulation results showed that the maximum throughput of Ethemet packets is up to 7 Mbps, that of UDP packets is up to 5.8 Mbps, and that of TCP packets is up to 3.4 Mbps, which showed that this embedded system can easily transmit basic voice and video signals through Ethemet, and that using only one chip can realize that many electronic devices access to the Intemet directly and get high performance.

A 1.2 V,3.1%3σ-accuracy thermal sensor analog front-end circuit in 12 nm CMOS process

This paper presents a 1.2 V high accuracy thermal sensor analog front-end circuit with 7 probes placed around the microprocessor chip.This analog front-end consists of a BGR(bandgap reference),a DEM(dynamic element matching)control,and probes.The BGR generates the voltages linear changed with temperature,which are followed by the data read out circuits.The superior accuracy of the BGR’s output voltage is a key factor for sensors fabricated via the FinFET digital process.Here,a 4-stage folded current bias structure is proposed,to increase DC accuracy and confer immunity against FinFET process variation due to limited device length and low current bias.At the same time,DEM is also adopted,so as to filter out current branch mismatches.Having been fabricated via a 12 nm FinFET CMOS process,200 chips were tested.The measurement results demonstrate that these analog front-end circuits can work steadily below 1.2 V,and a less than 3.1%3σ-accuracy level is achieved.Temperature stability is 0.088 mV/℃across a range from-40 to 130℃.

基于PID的CPU热点控制技术研究

随着程序设计复杂性的增加,并行性成为当今软件的一个显著特点,对微处理器性能的要求也越来越高。多核处理器的出现符合了这种趋势,但随之而来出现了处理器能耗增加和局部热点问题。以前的功率控制技术往往是在对程序执行历史分析的基础上,静态地在程序中设置功率调整点,不能实现处理器能量感知。本文借助控制理论,分析了PID控制技术在多核处理器中的应用,使性能和能量节省都得到了满足。

The MMU Implementation of Unity-1 Microprocessor

Virtual memory management is always a very essential issue of the modern microprocessor design. A memory management unit (MMU) is designed to implement a virtual machine for user programs, and provides a management mechanism between the operating system and user programs. This paper analyzes the tradeoffs considered in the MMU design of Unity 11 CPU of Peking University, and introduces in detail the solution of pure hardware table walking with two level page table organization. The implementation takes care of required operations and high performances needed by modern operating systems and low costs needed by embedded systems. This solution has been silicon proven, and successfully porting the Linux 2.4.17 kernel, the XWindow system, GNOME and most application software onto the Unity platform.

Technique development of PC104 embedded module and its application in the geophysical instrument design

The mainstream embedded resolutions widely adopted in the geophysical observation device are discussed in this paper. The advantages and its applicability of the PC104 embedded module are demonstrated through its performance description, technique development and its applications in the design of the fluxgate magnetometer, the movable seismograph and the GPS steering device.

Investigation on microprocessor based waveform control of short circuit transfer CO_2 welding

A new kind of simple and flexible CO2 welding system was developed to carry out waveform control. The system consisted of IGBT inverter, PWM circuit and microprocessor unit （ MPU） , in which the output current of constant current （CC） power supply could be changed according to transient physical state, and the variable down slope rate control could be used to ensure a stable welding process. The welding experiment results proved the effectiveness of this control approach.

The Automated System of Unified Templates as an Element of Trainability of Microprocessor Relay Protection Devices

The article discusses the possibility of further modernization of the standard microprocessor relay protection of AC overhead system feeders DPA-27.5-TNF, which is operated on the Trans-Baikal Railway by creating an additional automated system of unified templates necessary for the occurrence of “trainability” elements. The templates will be formed via a separate dedicated channel for transmission, processing and storage of the necessary information, not related to the operation of the terminal, with its subsequent visualization at the workplace of the duty personnel of traction substations, together with information from the “GID” software received via another dedicated wired channel. With the help of such a base of unified preset templates, in the future, it will be possible not only to identify the specific causes of each emergency shutdown but also to reduce their number by dynamically adjusting the existing presets of the standard operation algorithm.