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AN IMPROVED MODEL OF THE INTERCONNECTION DELAY OF MULTICHIP MODULES
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作者 Lai Jinmei Li Ke Lin Zhenghui Huang Peizhong(information and Electronic Engineering Dept., Zhejiang University, Hangzhou 310027)(Electronic Information School, Shanghai Jiaotong University, Shanghai 200030) 《Journal of Electronics(China)》 1999年第3期284-288,共5页
Moments of the system transfer function are closely related with the interconnection delays. Based on the first three moments, this paper presents an improved delay model for multichip module interconnection network. ... Moments of the system transfer function are closely related with the interconnection delays. Based on the first three moments, this paper presents an improved delay model for multichip module interconnection network. The model reveals an explicit causal relationship between delay of non-monotonic rising node voltage in tree-structure and design parameters. Obtained results not only provide a viable new method for computing interconnection delay, but also present a critical link between signal responses and design parameters. The derived formulas provide a tool to solve problems in the study of performance driven layout and routing algorithms. 展开更多
关键词 Multichip module INTERCONNECTION delay INTERCONNECT transmission lineS MOMENT generation MOMENT MATCHING
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On-Chip Built-in Jitter Measurement Circuit for PLL Based on Duty-Cycle Modulation Vernier Delay Line
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作者 余菲 李崇仁 张靖恺 《Tsinghua Science and Technology》 SCIE EI CAS 2007年第S1期128-133,共6页
Phase-locked loops (PLLs) are essential wherever a local event is synchronized with a periodic external event. They are utilized as on-chip clock frequency generators to synthesize a low skew and higher internal frequ... Phase-locked loops (PLLs) are essential wherever a local event is synchronized with a periodic external event. They are utilized as on-chip clock frequency generators to synthesize a low skew and higher internal frequency clock from an external lower frequency signal and its characterization and measurement have recently been calling for more and more attention. In this paper, a built-in on-chip circuit for measuring jitter of PLL based on a duty cycle modulation vernier delay line is proposed and demonstrated. The circuit employs two delay lines to measure the timing difference and transform the difference signal into digital words. The vernier lines are composed of delay cells whose duty cycle can be adjusted by a feedback voltage. It enables the circuit to have a self calibration capability which eliminates the mismatch problem caused by the process variation. 展开更多
关键词 phase-locked loop (PLL) jitter vernier delay line duty-cycle modulation on-chip test
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Researches in microwave photonics based packages for millimeter wave system with wide bandwidth and large dynamic range
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作者 Xiaoping ZHENG Shangyuan LI +1 位作者 Hanyi ZHANG Bingkun ZHOU 《Frontiers of Optoelectronics》 EI CSCD 2016年第2期186-193,共8页
This paper presents an introduction to the researches in microwave photonics based packages and its application, a 973 project (No. 2012CB315600), which focuses on addressing new requirements for millimeter wave (... This paper presents an introduction to the researches in microwave photonics based packages and its application, a 973 project (No. 2012CB315600), which focuses on addressing new requirements for millimeter wave (MMW) system to work with higher frequency, wider bandwidth, larger dynamic range and longer distance of signal distribution. Its key scientific problems, main research contents and objectives are briefed, and some latest achievements by the project team, including generation of linear frequency modulation wave (LFMW), tunable optoelectronic oscillator (OEO) with lower phase noise, reconfigurable filter with higher Q value, time delay line with wider frequency range, down conversion with gain, and local oscillator (LO) transmission with stable phase, are introduced briefly. 展开更多
关键词 linear frequency modulation wave (LFMW)generation tunable optoelectronic oscillator (OEO) recon-figurable filter time delay line DOWN-CONVERSION phasestable transmission
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