This paper describes the bipolar field-effect transistor (BiFET) and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis ...This paper describes the bipolar field-effect transistor (BiFET) and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis employs the parametric surface-electric-potential and the electrochemical (quasi-Fermi) potential-gradient driving force to compute the current. Output and transfer D. C. current and conductance versus voltage are presented over practi- cal ranges of terminal D. C. voltages and device parameters. Electron and hole surface channel currents are pres- ent simultaneously, a new feature which could provide circuit functions in one physical transistor such as the CMOS inverter and SRAM memory.展开更多
This paper gives the short channel analytical theory of the bipolar field-effect transistor (BiFET) with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper whic...This paper gives the short channel analytical theory of the bipolar field-effect transistor (BiFET) with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical (potential-gradient) current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates (MOS-gates) on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.展开更多
This paper describes the short channel theory of the bipolar field-effect transistor (BiFET) by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole em...This paper describes the short channel theory of the bipolar field-effect transistor (BiFET) by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and electron-hole-channel components of the output and transfer currents and conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates (MOS-gates) on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the long physical channel currents and conductances from those of the short electrical channels are reported.展开更多
The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transvers...The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley's 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular ( x, y, z) parallelepiped transistors,uniform in the width direction (z-axis),with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification: the 1-gate on semi-infinite-thick impure-base (the traditional bulk transistor), the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk (SOI) ,the 1-gate on thin impure-silicon layer deposited on insulating glass (SOI TFT), and the 2-gates on thin pure-base (FinFETs).展开更多
This paper describes the drift-diffusion theory of the bipolar field-effect transistor (BiFET) with two identical and connected metal-oxide-silicon-gates (MOS-gates) on a thin-pure-base. Analytical solution is obt...This paper describes the drift-diffusion theory of the bipolar field-effect transistor (BiFET) with two identical and connected metal-oxide-silicon-gates (MOS-gates) on a thin-pure-base. Analytical solution is obtained by partitioning the two-dimensional transistor into two one-dimensional problems coupled by the parametric sur- face-electric-potential. Total and component output and transfer currents and conductances versus D. C. voltages from the drift-diffusion theory, and their deviations from the electrochemical (quasi-Fermi) potential-gradient theory,are presented over practical ranges of thicknesses of the silicon base and gate oxide. A substantial contri- bution from the longitudinal gradient of the square of the transverse electric field is shown.展开更多
This paper describes the foundation underlying the device physics and theory of the semiconductor field effect transistor which is applicable to any devices with two carrier species in an electric field. The importanc...This paper describes the foundation underlying the device physics and theory of the semiconductor field effect transistor which is applicable to any devices with two carrier species in an electric field. The importance of the boundary conditions on the device current-voltage characteristics is discussed. An illustration is given of the transfer DCIV characteristics computed for two boundary conditions,one on electrical potential,giving much higher drift-limited parabolic current through the intrinsic transistor, and the other on the electrochemical potentials, giving much lower injection-over-thebarrier diffusion-limited current with ideal 60mV per decade exponential subthreshold roll-off, simulating electron and hole contacts. The two-MOS-gates on thin pure-body silicon field-effect transistor is used as examples展开更多
A novel simulation program with an integrated circuit emphasis(SPICE) model developed for trench-gate metal-oxide-semiconductor field-effect transistor(M OSFET)devices is proposed. The drift region resistance was ...A novel simulation program with an integrated circuit emphasis(SPICE) model developed for trench-gate metal-oxide-semiconductor field-effect transistor(M OSFET)devices is proposed. The drift region resistance was modeled according to the physical characteristics and the specific structure of the trench-gate MOSFET device. For the accurate simulation of dynamic characteristics, three important capacitances, gate-to-drain capacitance Cgd, gate-to-source capacitance Cgsand drain-to-source capacitance Cds, were modeled, respectively, in the proposed model. Furthermore,the self-heating effect, temperature effect and breakdown characteristic were taken into account; the self-heating model and breakdown model were built in the proposed model; and the temperature parameters of the model were revised. The proposed model is verified by experimental results, and the errors between measured data and simulation results of the novel model are less than 5%. Therefore, the model can give an accurate description for both the static and dynamic characteristics of the trench-gate MOSFET device.展开更多
Field-effect transistors (FETs) for logic applications, graphene and MoS2, are discussed. These materials have based on two representative two-dimensional (2D) materials, drastically different properties and requi...Field-effect transistors (FETs) for logic applications, graphene and MoS2, are discussed. These materials have based on two representative two-dimensional (2D) materials, drastically different properties and require different consider- ations. The unique band structure of graphene necessitates engineering of the Dirac point, including the opening of the bandgap, the doping and the interface, before the graphene can be used in logic applications. On the other hand, MoS2 is a semiconductor, and its electron transport depends heavily on the surface properties, the number of layers, and the carrier density. Finally, we discuss the prospects for the future developments in 2D material transistors.展开更多
Experiments and simulation studies on 283 MeV I ion induced single event effects of silicon carbide(SiC) metal–oxide–semiconductor field-effect transistors(MOSFETs) were carried out. When the cumulative irradiation ...Experiments and simulation studies on 283 MeV I ion induced single event effects of silicon carbide(SiC) metal–oxide–semiconductor field-effect transistors(MOSFETs) were carried out. When the cumulative irradiation fluence of the SiC MOSFET reached 5×10^(6)ion·cm^(-2), the drain–gate channel current increased under 200 V drain voltage, the drain–gate channel current and the drain–source channel current increased under 350 V drain voltage. The device occurred single event burnout under 800 V drain voltage, resulting in a complete loss of breakdown voltage. Combined with emission microscope, scanning electron microscope and focused ion beam analysis, the device with increased drain–gate channel current and drain–source channel current was found to have drain–gate channel current leakage point and local source metal melt, and the device with single event burnout was found to have local melting of its gate, source, epitaxial layer and substrate. Combining with Monte Carlo simulation and TCAD electrothermal simulation, it was found that the initial area of single event burnout might occur at the source–gate corner or the substrate–epitaxial interface, electric field and current density both affected the lattice temperature peak. The excessive lattice temperature during the irradiation process appeared at the local source contact, which led to the drain–source channel damage. And the excessive electric field appeared in the gate oxide layer, resulting in drain–gate channel damage.展开更多
A power metal-oxide-semiconductor field-effect transistor(MOSFET) with dielectric trench is investigated to enhance the reversed blocking capability. The dielectric trench with a low permittivity to reduce the electri...A power metal-oxide-semiconductor field-effect transistor(MOSFET) with dielectric trench is investigated to enhance the reversed blocking capability. The dielectric trench with a low permittivity to reduce the electric field at reversed blocking state has been studied. To analyze the electric field, the drift region is segmented into four regions, where the conformal mapping method based on Schwarz–Christoffel transformation has been applied. According to the analysis, the improvement in the electric field for using the low permittivity trench is mainly due to the two electric field peaks generated in the drift region around this dielectric trench. The analytical results of the electric field and the potential models are in good agreement with the simulation results.展开更多
Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) metal-oxide-semiconductor field-effect transistor ...Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) metal-oxide-semiconductor field-effect transistor (PMOSFET), analytical expressions of the threshold voltages for buried channel and surface channel are presented. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel (tensile strained Si), because the hole mobility in the buried channel is higher than that in the surface channel. Thus they offer a good accuracy as compared with the results of device simulator ISE. With this model, the variations of threshold voltage and maximum allowed thickness of s-Si with design parameters can be predicted, such as Ge fraction, layer thickness, and doping concentration. This model can serve as a useful tool for p-channel s-Si/s-SiGe/Si1-yGey metal-oxide-semiconductor field-effect transistor (MOSFET) designs.展开更多
Radiation effects of silicon carbide metal–oxide–semiconductor field-effect transistors(SiC MOSFETs)induced by 20 MeV proton under drain bias(V_(D)=800 V,V_(G)=0 V),gate bias(V_(D)=0 V,V_(G)=10 V),turn-on bias(V_(D)...Radiation effects of silicon carbide metal–oxide–semiconductor field-effect transistors(SiC MOSFETs)induced by 20 MeV proton under drain bias(V_(D)=800 V,V_(G)=0 V),gate bias(V_(D)=0 V,V_(G)=10 V),turn-on bias(V_(D)=0.5 V,V_(G)=4 V)and static bias(V_(D)=0 V,V_(G)=0 V)are investigated.The drain current of SiC MOSFET under turn-on bias increases linearly with the increase of proton fluence during the proton irradiation.When the cumulative proton fluence reaches 2×10^(11)p·cm^(-2),the threshold voltage of SiC MOSFETs with four bias conditions shifts to the left,and the degradation of electrical characteristics of SiC MOSFETs with gate bias is the most serious.In the deep level transient spectrum test,it is found that the defect energy level of SiC MOSFET is mainly the ON2(E_(c)-1.1 eV)defect center,and the defect concentration and defect capture cross section of SiC MOSFET with proton radiation under gate bias increase most.By comparing the degradation of SiC MOSFET under proton cumulative irradiation,equivalent 1 MeV neutron irradiation and gamma irradiation,and combining with the defect change of SiC MOSFET under gamma irradiation and the non-ionizing energy loss induced by equivalent 1 MeV neutron in SiC MOSFET,the degradation of SiC MOSFET induced by proton is mainly caused by ionizing radiation damage.The results of TCAD analysis show that the ionizing radiation damage of SiC MOSFET is affected by the intensity and direction of the electric field in the oxide layer and epitaxial layer.展开更多
Ge complementary tunneling field-effect transistors(TFETs) are fabricated with the NiGe metal source/drain(S/D) structure. The dopant segregation method is employed to form the NiGe/Ge tunneling junctions of suffi...Ge complementary tunneling field-effect transistors(TFETs) are fabricated with the NiGe metal source/drain(S/D) structure. The dopant segregation method is employed to form the NiGe/Ge tunneling junctions of sufficiently high Schottky barrier heights. As a result, the Ge p-and n-TFETs exhibit decent electrical properties of large ON-state current and steep sub-threshold slope(S factor). Especially, I_d of 0.2 μA/μm is revealed at V_g-V_(th) = V_d = ±0.5 V for Ge pTFETs,with the S factor of 28 mV/dec at 7 K.展开更多
Growing a silicon(Si) layer on top of stacked Si-germanium(Ge) compressive layer can introduce a tensile strain on the former, resulting in superior device characteristics. Such a structure can be used for high perfor...Growing a silicon(Si) layer on top of stacked Si-germanium(Ge) compressive layer can introduce a tensile strain on the former, resulting in superior device characteristics. Such a structure can be used for high performance complementary metal-oxide-semiconductor(CMOS) circuits. Down scaling metal-oxide-semiconductor field-effect transistors(MOSFETs) into the deep submicron/nanometer regime forces the source(S) and drain(D) series resistance to become comparable with the channel resistance and thus it cannot be neglected. Owing to the persisting technological importance of strained Si devices, in this work, we propose a multi-iterative technique for evaluating the performance of strained-Si/strained-Si_(1-y)Ge_y/relaxed-Si_(1-x)Ge_x MOSFETs and its related circuits in the presence of S/D series resistance, leading to the development of a simulator that can faithfully plot the performance of the device and related digital circuits. The impact of strain on device/circuit performance is also investigated with emphasis on metal gate and high-k dielectric materials.展开更多
The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors (VDMOSFETs) are reported. The drift layer is 17μm in thickness with 5 × 10...The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors (VDMOSFETs) are reported. The drift layer is 17μm in thickness with 5 × 10^15 cm^-3 n-type doping, and the channel length is 1μm. The MOSFETs show a peak mobility of 17cm2/V.s and a typical threshold voltage of 3 V. The active area of 0.028cm2 delivers a forward drain current of 7A at Vcs = 22 V and VDS= 15 V. The specific on-resistance (Ron,sv) is 18mΩ.cm2 at VGS= 22 V and the blocking voltage is 1975 V (IDS 〈 lOOnA) at VGS = 0 V.展开更多
As dimensions of the metal-oxide-semiconductor field-effect transistor (MOSFET) are scaling down and the thickness of gate oxide is decreased,the gate leakage becomes more and more prominent and has been one of the mo...As dimensions of the metal-oxide-semiconductor field-effect transistor (MOSFET) are scaling down and the thickness of gate oxide is decreased,the gate leakage becomes more and more prominent and has been one of the most important limiting factors to MOSFET and circuits lifetime.Based on reliability theory and experiments,the direct tunneling current in lightly-doped drain (LDD) NMOSFET with 1.4 nm gate oxide fabricated by 90 nm complementary metal oxide semiconductor (CMOS) process was studied in depth.High-precision semiconductor parameter analyzer was used to conduct the tests.Law of variation of the direct tunneling (DT) current with channel length,channel width,measuring voltage,drain bias and reverse substrate bias was revealed.The results show that the change of the DT current obeys index law;there is a linear relationship between gate current and channel dimension;drain bias and substrate bias can reduce the gate current.展开更多
The magnetoresistive random access memory process makes a great contribution to threshold voltage deterioration of metal-oxide-silicon field-effect transistors,especially on p-type devices.Herein,a method was proposed...The magnetoresistive random access memory process makes a great contribution to threshold voltage deterioration of metal-oxide-silicon field-effect transistors,especially on p-type devices.Herein,a method was proposed to reduce the threshold voltage degradation by utilizing back-side stress.Through the deposition of tensile material on the back side,positive charges generated by silicon-hydrogen bond breakage were inhibited,resulting in a potential reduction in threshold voltage shift by up to 20%.In addition,it was found that the method could only relieve silicon-hydrogen bond breakage physically,thus failing to provide a complete cure.However,it holds significant potential for applications where additional thermal budget is undesired.Furthermore,it was also concluded that the method used in this work is irreversible,with its effect sustained to the chip package phase,and it ensures competitive reliability of the resulting magnetic tunnel junction devices.展开更多
A field-effect transistor (FET) with two-dimensional (2D) few-layer MoS2 as a sensing-channel material was investigated for label-free electrical detection of the hybridization of deoxyribonucleic acid (DNA) mol...A field-effect transistor (FET) with two-dimensional (2D) few-layer MoS2 as a sensing-channel material was investigated for label-free electrical detection of the hybridization of deoxyribonucleic acid (DNA) molecules. The high-quality MoS2-channel pattern was selectively formedthrough the chemical reaction of the Mo layer with H2S gas. The MoS2 FET was very stable in an electrolyte and inert to pH changes due to the lack of oxygen-containing functionalities on the MoS2 surface. Hybridization of single-stranded target DNA molecules with single-stranded probe DNA molecules physically adsorbed on the MoS2 channel resulted in a shift of the threshold voltage (Vt,) in the negative direction and an increase in the drain current. The negative shift in Vth is attributed to electrostatic gating effects induced by the detachment of negatively charged probe DNA molecules from the channel surface after hybridization. A detection limit of 10 fM, high sensitivity of 17 mWdec, and high dynamic range of 106 were achieved. The results showed that a bio-FET with an ultrathin 2D MoS2 channel can be used to detect very small concentrations of target DNA molecules specifically hybridized with the probe DNA molecules.展开更多
文摘This paper describes the bipolar field-effect transistor (BiFET) and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis employs the parametric surface-electric-potential and the electrochemical (quasi-Fermi) potential-gradient driving force to compute the current. Output and transfer D. C. current and conductance versus voltage are presented over practi- cal ranges of terminal D. C. voltages and device parameters. Electron and hole surface channel currents are pres- ent simultaneously, a new feature which could provide circuit functions in one physical transistor such as the CMOS inverter and SRAM memory.
文摘This paper gives the short channel analytical theory of the bipolar field-effect transistor (BiFET) with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical (potential-gradient) current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates (MOS-gates) on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.
文摘This paper describes the short channel theory of the bipolar field-effect transistor (BiFET) by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and electron-hole-channel components of the output and transfer currents and conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates (MOS-gates) on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the long physical channel currents and conductances from those of the short electrical channels are reported.
文摘The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley's 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular ( x, y, z) parallelepiped transistors,uniform in the width direction (z-axis),with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification: the 1-gate on semi-infinite-thick impure-base (the traditional bulk transistor), the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk (SOI) ,the 1-gate on thin impure-silicon layer deposited on insulating glass (SOI TFT), and the 2-gates on thin pure-base (FinFETs).
文摘This paper describes the drift-diffusion theory of the bipolar field-effect transistor (BiFET) with two identical and connected metal-oxide-silicon-gates (MOS-gates) on a thin-pure-base. Analytical solution is obtained by partitioning the two-dimensional transistor into two one-dimensional problems coupled by the parametric sur- face-electric-potential. Total and component output and transfer currents and conductances versus D. C. voltages from the drift-diffusion theory, and their deviations from the electrochemical (quasi-Fermi) potential-gradient theory,are presented over practical ranges of thicknesses of the silicon base and gate oxide. A substantial contri- bution from the longitudinal gradient of the square of the transverse electric field is shown.
文摘This paper describes the foundation underlying the device physics and theory of the semiconductor field effect transistor which is applicable to any devices with two carrier species in an electric field. The importance of the boundary conditions on the device current-voltage characteristics is discussed. An illustration is given of the transfer DCIV characteristics computed for two boundary conditions,one on electrical potential,giving much higher drift-limited parabolic current through the intrinsic transistor, and the other on the electrochemical potentials, giving much lower injection-over-thebarrier diffusion-limited current with ideal 60mV per decade exponential subthreshold roll-off, simulating electron and hole contacts. The two-MOS-gates on thin pure-body silicon field-effect transistor is used as examples
基金The National Natural Science Foundation of China(No.61604038)China Postdoctoral Science Foundation(No.2015M580376)+1 种基金the Natural Science Foundation of Jiangsu Province(No.BK20160691)Jiangsu Postdoctoral Science Foundation(No.1501010A)
文摘A novel simulation program with an integrated circuit emphasis(SPICE) model developed for trench-gate metal-oxide-semiconductor field-effect transistor(M OSFET)devices is proposed. The drift region resistance was modeled according to the physical characteristics and the specific structure of the trench-gate MOSFET device. For the accurate simulation of dynamic characteristics, three important capacitances, gate-to-drain capacitance Cgd, gate-to-source capacitance Cgsand drain-to-source capacitance Cds, were modeled, respectively, in the proposed model. Furthermore,the self-heating effect, temperature effect and breakdown characteristic were taken into account; the self-heating model and breakdown model were built in the proposed model; and the temperature parameters of the model were revised. The proposed model is verified by experimental results, and the errors between measured data and simulation results of the novel model are less than 5%. Therefore, the model can give an accurate description for both the static and dynamic characteristics of the trench-gate MOSFET device.
基金supported by the National Basic Research Program of China (Grant No. 2013CBA01600)the National Natural Science Foundation of China (Grant Nos. 61261160499 and 11274154)+2 种基金the National Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. 2011ZX02707)the Natural Science Foundation of Jiangsu Province, China (Grant No. BK2012302)the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20120091110028)
文摘Field-effect transistors (FETs) for logic applications, graphene and MoS2, are discussed. These materials have based on two representative two-dimensional (2D) materials, drastically different properties and require different consider- ations. The unique band structure of graphene necessitates engineering of the Dirac point, including the opening of the bandgap, the doping and the interface, before the graphene can be used in logic applications. On the other hand, MoS2 is a semiconductor, and its electron transport depends heavily on the surface properties, the number of layers, and the carrier density. Finally, we discuss the prospects for the future developments in 2D material transistors.
基金supported by the National Natural Science Foundation of China (Grant No. 12075065)。
文摘Experiments and simulation studies on 283 MeV I ion induced single event effects of silicon carbide(SiC) metal–oxide–semiconductor field-effect transistors(MOSFETs) were carried out. When the cumulative irradiation fluence of the SiC MOSFET reached 5×10^(6)ion·cm^(-2), the drain–gate channel current increased under 200 V drain voltage, the drain–gate channel current and the drain–source channel current increased under 350 V drain voltage. The device occurred single event burnout under 800 V drain voltage, resulting in a complete loss of breakdown voltage. Combined with emission microscope, scanning electron microscope and focused ion beam analysis, the device with increased drain–gate channel current and drain–source channel current was found to have drain–gate channel current leakage point and local source metal melt, and the device with single event burnout was found to have local melting of its gate, source, epitaxial layer and substrate. Combining with Monte Carlo simulation and TCAD electrothermal simulation, it was found that the initial area of single event burnout might occur at the source–gate corner or the substrate–epitaxial interface, electric field and current density both affected the lattice temperature peak. The excessive lattice temperature during the irradiation process appeared at the local source contact, which led to the drain–source channel damage. And the excessive electric field appeared in the gate oxide layer, resulting in drain–gate channel damage.
基金Project supported by the National Natural Science Foundation of China(Grant No.61404110)the National Higher-education Institution General Research and Development Project,China(Grant No.2682014CX097)
文摘A power metal-oxide-semiconductor field-effect transistor(MOSFET) with dielectric trench is investigated to enhance the reversed blocking capability. The dielectric trench with a low permittivity to reduce the electric field at reversed blocking state has been studied. To analyze the electric field, the drift region is segmented into four regions, where the conformal mapping method based on Schwarz–Christoffel transformation has been applied. According to the analysis, the improvement in the electric field for using the low permittivity trench is mainly due to the two electric field peaks generated in the drift region around this dielectric trench. The analytical results of the electric field and the potential models are in good agreement with the simulation results.
基金Project supported by the National Defence Pre-research Foundation of China (Grant Nos. 51308040203,9140A08060407DZ0103,and 6139801)
文摘Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) metal-oxide-semiconductor field-effect transistor (PMOSFET), analytical expressions of the threshold voltages for buried channel and surface channel are presented. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel (tensile strained Si), because the hole mobility in the buried channel is higher than that in the surface channel. Thus they offer a good accuracy as compared with the results of device simulator ISE. With this model, the variations of threshold voltage and maximum allowed thickness of s-Si with design parameters can be predicted, such as Ge fraction, layer thickness, and doping concentration. This model can serve as a useful tool for p-channel s-Si/s-SiGe/Si1-yGey metal-oxide-semiconductor field-effect transistor (MOSFET) designs.
基金Project supported by the National Natural Science Foundation of China(Grant No.12075065)。
文摘Radiation effects of silicon carbide metal–oxide–semiconductor field-effect transistors(SiC MOSFETs)induced by 20 MeV proton under drain bias(V_(D)=800 V,V_(G)=0 V),gate bias(V_(D)=0 V,V_(G)=10 V),turn-on bias(V_(D)=0.5 V,V_(G)=4 V)and static bias(V_(D)=0 V,V_(G)=0 V)are investigated.The drain current of SiC MOSFET under turn-on bias increases linearly with the increase of proton fluence during the proton irradiation.When the cumulative proton fluence reaches 2×10^(11)p·cm^(-2),the threshold voltage of SiC MOSFETs with four bias conditions shifts to the left,and the degradation of electrical characteristics of SiC MOSFETs with gate bias is the most serious.In the deep level transient spectrum test,it is found that the defect energy level of SiC MOSFET is mainly the ON2(E_(c)-1.1 eV)defect center,and the defect concentration and defect capture cross section of SiC MOSFET with proton radiation under gate bias increase most.By comparing the degradation of SiC MOSFET under proton cumulative irradiation,equivalent 1 MeV neutron irradiation and gamma irradiation,and combining with the defect change of SiC MOSFET under gamma irradiation and the non-ionizing energy loss induced by equivalent 1 MeV neutron in SiC MOSFET,the degradation of SiC MOSFET induced by proton is mainly caused by ionizing radiation damage.The results of TCAD analysis show that the ionizing radiation damage of SiC MOSFET is affected by the intensity and direction of the electric field in the oxide layer and epitaxial layer.
基金Supported by the National Natural Science Foundation of China under Grant No 61504120the Zhejiang Provincial Natural Science Foundation of China under Grant No LR18F040001the Fundamental Research Funds for the Central Universities
文摘Ge complementary tunneling field-effect transistors(TFETs) are fabricated with the NiGe metal source/drain(S/D) structure. The dopant segregation method is employed to form the NiGe/Ge tunneling junctions of sufficiently high Schottky barrier heights. As a result, the Ge p-and n-TFETs exhibit decent electrical properties of large ON-state current and steep sub-threshold slope(S factor). Especially, I_d of 0.2 μA/μm is revealed at V_g-V_(th) = V_d = ±0.5 V for Ge pTFETs,with the S factor of 28 mV/dec at 7 K.
文摘Growing a silicon(Si) layer on top of stacked Si-germanium(Ge) compressive layer can introduce a tensile strain on the former, resulting in superior device characteristics. Such a structure can be used for high performance complementary metal-oxide-semiconductor(CMOS) circuits. Down scaling metal-oxide-semiconductor field-effect transistors(MOSFETs) into the deep submicron/nanometer regime forces the source(S) and drain(D) series resistance to become comparable with the channel resistance and thus it cannot be neglected. Owing to the persisting technological importance of strained Si devices, in this work, we propose a multi-iterative technique for evaluating the performance of strained-Si/strained-Si_(1-y)Ge_y/relaxed-Si_(1-x)Ge_x MOSFETs and its related circuits in the presence of S/D series resistance, leading to the development of a simulator that can faithfully plot the performance of the device and related digital circuits. The impact of strain on device/circuit performance is also investigated with emphasis on metal gate and high-k dielectric materials.
基金Supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China under Grant No 2013ZX02305
文摘The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors (VDMOSFETs) are reported. The drift layer is 17μm in thickness with 5 × 10^15 cm^-3 n-type doping, and the channel length is 1μm. The MOSFETs show a peak mobility of 17cm2/V.s and a typical threshold voltage of 3 V. The active area of 0.028cm2 delivers a forward drain current of 7A at Vcs = 22 V and VDS= 15 V. The specific on-resistance (Ron,sv) is 18mΩ.cm2 at VGS= 22 V and the blocking voltage is 1975 V (IDS 〈 lOOnA) at VGS = 0 V.
基金Project(61074051)supported by the National Natural Science Foundation of ChinaProject(10C0709)supported by the Scientific Research Fund of Education Department of Hunan Province,ChinaProject(2011GK3058)supported by the Science and Technology Plan of Hunan Province,China
文摘As dimensions of the metal-oxide-semiconductor field-effect transistor (MOSFET) are scaling down and the thickness of gate oxide is decreased,the gate leakage becomes more and more prominent and has been one of the most important limiting factors to MOSFET and circuits lifetime.Based on reliability theory and experiments,the direct tunneling current in lightly-doped drain (LDD) NMOSFET with 1.4 nm gate oxide fabricated by 90 nm complementary metal oxide semiconductor (CMOS) process was studied in depth.High-precision semiconductor parameter analyzer was used to conduct the tests.Law of variation of the direct tunneling (DT) current with channel length,channel width,measuring voltage,drain bias and reverse substrate bias was revealed.The results show that the change of the DT current obeys index law;there is a linear relationship between gate current and channel dimension;drain bias and substrate bias can reduce the gate current.
基金Project supported by the National Natural Science Foundation of China(Grant No.51672246)the National Key Research and Development Program of China(Grant Nos.2017YFA0304302 and 2020AAA0109003)the Key Research and Development Program of Zhejiang Province,China(Grant No.2021C01002)。
文摘The magnetoresistive random access memory process makes a great contribution to threshold voltage deterioration of metal-oxide-silicon field-effect transistors,especially on p-type devices.Herein,a method was proposed to reduce the threshold voltage degradation by utilizing back-side stress.Through the deposition of tensile material on the back side,positive charges generated by silicon-hydrogen bond breakage were inhibited,resulting in a potential reduction in threshold voltage shift by up to 20%.In addition,it was found that the method could only relieve silicon-hydrogen bond breakage physically,thus failing to provide a complete cure.However,it holds significant potential for applications where additional thermal budget is undesired.Furthermore,it was also concluded that the method used in this work is irreversible,with its effect sustained to the chip package phase,and it ensures competitive reliability of the resulting magnetic tunnel junction devices.
文摘A field-effect transistor (FET) with two-dimensional (2D) few-layer MoS2 as a sensing-channel material was investigated for label-free electrical detection of the hybridization of deoxyribonucleic acid (DNA) molecules. The high-quality MoS2-channel pattern was selectively formedthrough the chemical reaction of the Mo layer with H2S gas. The MoS2 FET was very stable in an electrolyte and inert to pH changes due to the lack of oxygen-containing functionalities on the MoS2 surface. Hybridization of single-stranded target DNA molecules with single-stranded probe DNA molecules physically adsorbed on the MoS2 channel resulted in a shift of the threshold voltage (Vt,) in the negative direction and an increase in the drain current. The negative shift in Vth is attributed to electrostatic gating effects induced by the detachment of negatively charged probe DNA molecules from the channel surface after hybridization. A detection limit of 10 fM, high sensitivity of 17 mWdec, and high dynamic range of 106 were achieved. The results showed that a bio-FET with an ultrathin 2D MoS2 channel can be used to detect very small concentrations of target DNA molecules specifically hybridized with the probe DNA molecules.