Quantum coherence,emerging from the"superposition"of quantum states,is widely used in various information processing tasks.Recently,the resource theory of multilevel quantum coherence is attracting substanti...Quantum coherence,emerging from the"superposition"of quantum states,is widely used in various information processing tasks.Recently,the resource theory of multilevel quantum coherence is attracting substantial attention.In this paper,we mainly study the transformations of resource pure states via free operations in the theoretical framework for multilevel coherence.We prove that any two multilevel coherent resource pure states can be interconverted with a nonzero probability via a completely positive and trace non-increasing k-coherence-preserving map.Meanwhile,we present the condition of the interconversions of two multilevel coherent resource pure states under k-coherence-preserving operations.In addition,we obtain that in the resource-theoretic framework of multilevel coherence,no resource state is isolated,that is,given a multilevel coherent pure state|ψ>,there exists another multilevel coherent pure state|Φ>and a k-coherence-preserving operation∧k,such that∧k(|Φ>)=|ψ>.展开更多
The multilevel storage capability of nonvolatile resistive random access memory(ReRAM)is greatly de-sired to accomplish high functioning memory density.In this study,Ta_(2)O_(5) thin film with different thick-nesses(2...The multilevel storage capability of nonvolatile resistive random access memory(ReRAM)is greatly de-sired to accomplish high functioning memory density.In this study,Ta_(2)O_(5) thin film with different thick-nesses(2,4,and 6 nm)was exploited as an appropriate interfacial barrier layer for limiting the formation of the interfacial layer between the 10 nm thick sputtering deposited resistive switching(RS)layer and Ta ohmic electrode to improve the switching cycle endurance and uniformity.Results show that lower form-ing voltage,narrow distribution of SET-voltages,good dc switching cycles(10^(3)),high pulse endurance(10^(6) cycles),long retention time(10^(4) s at room temperature and 100℃),and reliable multilevel resis-tance states were obtained at an appropriate thickness of∼2 nm Ta_(2)O_(5) interfacial barrier layer instead of without Ta_(2)O_(5) and with∼4 nm,and∼6 nm Ta_(2)O_(5) barrier layer,ZrO_(2)-based memristive devices.Besides,multilevel resistance states have been scientifically investigated via modulating the compliance current(CC)and RESET-stop voltages,which displays that all of the resistance states were distinct and stayed stable without any considerable deprivation over 10^(4) s retention time and 104 pulse endurance cycles.The I-V characteristics of RESET-stop voltage(from−1.7 to−2.3 V)of HRS are found to be a good linear fit with the Schottky equation.It can be seen that Schottky barrier height rises by increasing the stop-voltage during RESET-operation,resulting in enhancing the data storage memory window(on/offratio).Moreover,RESET-voltage and CC control of HRS and LRS revealed the physical origin of the RS mecha-nism,which entails the formation and rupture of conducting nanofilaments.It is thoroughly investigated that proper optimization of the barrier layer at the ohmic interface and the switching layer is essential in memristive devices.These results demonstrate that the ZrO_(2)-based memristive device with an optimized∼2 nm Ta_(2)O_(5) barrier layer is a promising candidate for multilevel data storage memory applications.展开更多
基金supported by the National Natural Science Foundation of China(Grant No.12071110)the Hebei Natural Science Foundation of China(Grant Nos.A2020205014,and A2018205125)the Science and Technology Project of Hebei Education Department(Grant Nos.ZD2020167,and ZD2021066)。
文摘Quantum coherence,emerging from the"superposition"of quantum states,is widely used in various information processing tasks.Recently,the resource theory of multilevel quantum coherence is attracting substantial attention.In this paper,we mainly study the transformations of resource pure states via free operations in the theoretical framework for multilevel coherence.We prove that any two multilevel coherent resource pure states can be interconverted with a nonzero probability via a completely positive and trace non-increasing k-coherence-preserving map.Meanwhile,we present the condition of the interconversions of two multilevel coherent resource pure states under k-coherence-preserving operations.In addition,we obtain that in the resource-theoretic framework of multilevel coherence,no resource state is isolated,that is,given a multilevel coherent pure state|ψ>,there exists another multilevel coherent pure state|Φ>and a k-coherence-preserving operation∧k,such that∧k(|Φ>)=|ψ>.
基金supported in part by the National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIP) (No.2021R1C1C1004422)the Dongguk University Research Fund of 2020supported through the National Research Foundation of Korea (NRF) funded by the Ministry of Science,ICT & Future Planning (Nos.NRF2020M3F3A2A02082449 and NRF-2016R1A6A1A03013422)。
文摘The multilevel storage capability of nonvolatile resistive random access memory(ReRAM)is greatly de-sired to accomplish high functioning memory density.In this study,Ta_(2)O_(5) thin film with different thick-nesses(2,4,and 6 nm)was exploited as an appropriate interfacial barrier layer for limiting the formation of the interfacial layer between the 10 nm thick sputtering deposited resistive switching(RS)layer and Ta ohmic electrode to improve the switching cycle endurance and uniformity.Results show that lower form-ing voltage,narrow distribution of SET-voltages,good dc switching cycles(10^(3)),high pulse endurance(10^(6) cycles),long retention time(10^(4) s at room temperature and 100℃),and reliable multilevel resis-tance states were obtained at an appropriate thickness of∼2 nm Ta_(2)O_(5) interfacial barrier layer instead of without Ta_(2)O_(5) and with∼4 nm,and∼6 nm Ta_(2)O_(5) barrier layer,ZrO_(2)-based memristive devices.Besides,multilevel resistance states have been scientifically investigated via modulating the compliance current(CC)and RESET-stop voltages,which displays that all of the resistance states were distinct and stayed stable without any considerable deprivation over 10^(4) s retention time and 104 pulse endurance cycles.The I-V characteristics of RESET-stop voltage(from−1.7 to−2.3 V)of HRS are found to be a good linear fit with the Schottky equation.It can be seen that Schottky barrier height rises by increasing the stop-voltage during RESET-operation,resulting in enhancing the data storage memory window(on/offratio).Moreover,RESET-voltage and CC control of HRS and LRS revealed the physical origin of the RS mecha-nism,which entails the formation and rupture of conducting nanofilaments.It is thoroughly investigated that proper optimization of the barrier layer at the ohmic interface and the switching layer is essential in memristive devices.These results demonstrate that the ZrO_(2)-based memristive device with an optimized∼2 nm Ta_(2)O_(5) barrier layer is a promising candidate for multilevel data storage memory applications.