The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. Th...The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. The hot carrier degradation effect of n-MOSFET in high-,mid-,and low gate stresses and its 1/fγ noise feature are studied. Experimental results agree well with the developed model.展开更多
we investigate the effects of 60^Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator （PDSOI） input/output （I/O） n-MOSFETs. A shallow trench isolation （STI） parasitic transistor is responsi...we investigate the effects of 60^Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator （PDSOI） input/output （I/O） n-MOSFETs. A shallow trench isolation （STI） parasitic transistor is responsible for the observed hump in the back-gate transfer characteristic curve. The STI parasitic transistor, in which the trench oxide acts as the gate oxide, is sensitive to the radiation, and it introduces a new way to characterize the total ionizing dose （TID） responses in the STI oxide. A radiation enhanced drain induced barrier lower （DIBL） effect is observed in the STI parasitic transistor. It is manifested as the drain bias dependence of the radiation-induced off-state leakage and the increase of the DIBL parameter in the STI parasitic transistor after irradiation. Increasing the doping concentration in the whole body region or just near the STI sidewall can increase the threshold voltage of the STI parasitic transistor, and further reduce the radiation-induced off-state leakage. Moreover, we find that the radiation-induced trapped charge in the buried oxide leads to an obvious front-gate threshold voltage shift through the coupling effect. The high doping concentration in the body can effectively suppress the radiation-induced coupling effect.展开更多
Hot carriers injection （HCI） tests for ultra-short channel n-MOSFET devices were studied. The experimental data of short channel devices （75-90 nm）, which does not fit formal degradation power law well, will bring...Hot carriers injection （HCI） tests for ultra-short channel n-MOSFET devices were studied. The experimental data of short channel devices （75-90 nm）, which does not fit formal degradation power law well, will bring severe error in lifetime prediction. This phenomenon usually happens under high drain voltage （Vd） stress condition. A new model was presented to fit the degradation curve better. It was observed that the peak of the substrate current under low drain voltage stress cannot be found in ultra-short channel device. Devices with different channel lengths were studied under different Vd stresses in order to understand the relations between peak of substrate current （/sub） and channel length/stress voltage.展开更多
This paper presents a different approach of Intermediate Frequency (IF) amplifier using 0.18 μm MIETEC technology channel length of MOSFET Darlington transistors. In contrast to Bipolar conventional Darlingtonpair, a...This paper presents a different approach of Intermediate Frequency (IF) amplifier using 0.18 μm MIETEC technology channel length of MOSFET Darlington transistors. In contrast to Bipolar conventional Darlingtonpair, a MOSFET Darlington configuration is employed to reduce supply voltage (VDD) and DC consumption power (Pc). The frequency response parameters of the proposed design such as bandwidth, gain bandwidth product, input/output noises and noise figure (NF) are improved in proposed (IF) amplifier. Moreover, a dual-input and dual-output (DIDO) IF amplifier constructed from two symmetrical single input and single output (SISO) (IF) amplifier is proposed too. The idea is to achieve improved bandwidth, and flat response, because these parameters are very important in high frequency applications. Simulation results that obtained by P-SPICE program are 1.2 GHz Bandwidth (BW), 3.4 GHz (gain bandwidth product), 0.5 mW DC consumption power (Pc) and the low total output noise is 12 nV with 1.2 V single supply voltage.展开更多
A novel scalable model of substrate components for deep n-well (DNW) RF MOSFETs with different number of fingers is presented for the first time. The test structure developed in [1] is employed to directly access the ...A novel scalable model of substrate components for deep n-well (DNW) RF MOSFETs with different number of fingers is presented for the first time. The test structure developed in [1] is employed to directly access the characteristics of the substrate to extract the different substrate components. A methodology is developed to directly extract the parameters for the substrate network from the measured data. By using the measured two-port data of a set of nMOSFETs with different number of fingers, with the DNW in grounded and float configuration, respectively, the parameters of the scalable substrate model are obtained. The method and the substrate model are further verified and validated by matching the measured and simulated output admittances. Excellent agreement up to 40 GHz for configurations in common-source has been achieved.展开更多
文摘The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. The hot carrier degradation effect of n-MOSFET in high-,mid-,and low gate stresses and its 1/fγ noise feature are studied. Experimental results agree well with the developed model.
基金supported by the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory,China(Grant No.ZHD201205)the National Natural Science Foundation of China(Grant No.61106103)
文摘we investigate the effects of 60^Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator （PDSOI） input/output （I/O） n-MOSFETs. A shallow trench isolation （STI） parasitic transistor is responsible for the observed hump in the back-gate transfer characteristic curve. The STI parasitic transistor, in which the trench oxide acts as the gate oxide, is sensitive to the radiation, and it introduces a new way to characterize the total ionizing dose （TID） responses in the STI oxide. A radiation enhanced drain induced barrier lower （DIBL） effect is observed in the STI parasitic transistor. It is manifested as the drain bias dependence of the radiation-induced off-state leakage and the increase of the DIBL parameter in the STI parasitic transistor after irradiation. Increasing the doping concentration in the whole body region or just near the STI sidewall can increase the threshold voltage of the STI parasitic transistor, and further reduce the radiation-induced off-state leakage. Moreover, we find that the radiation-induced trapped charge in the buried oxide leads to an obvious front-gate threshold voltage shift through the coupling effect. The high doping concentration in the body can effectively suppress the radiation-induced coupling effect.
基金Project supported by the National Natural Science Foundation of China （Grant No 60376024）.
文摘Hot carriers injection （HCI） tests for ultra-short channel n-MOSFET devices were studied. The experimental data of short channel devices （75-90 nm）, which does not fit formal degradation power law well, will bring severe error in lifetime prediction. This phenomenon usually happens under high drain voltage （Vd） stress condition. A new model was presented to fit the degradation curve better. It was observed that the peak of the substrate current under low drain voltage stress cannot be found in ultra-short channel device. Devices with different channel lengths were studied under different Vd stresses in order to understand the relations between peak of substrate current （/sub） and channel length/stress voltage.
文摘This paper presents a different approach of Intermediate Frequency (IF) amplifier using 0.18 μm MIETEC technology channel length of MOSFET Darlington transistors. In contrast to Bipolar conventional Darlingtonpair, a MOSFET Darlington configuration is employed to reduce supply voltage (VDD) and DC consumption power (Pc). The frequency response parameters of the proposed design such as bandwidth, gain bandwidth product, input/output noises and noise figure (NF) are improved in proposed (IF) amplifier. Moreover, a dual-input and dual-output (DIDO) IF amplifier constructed from two symmetrical single input and single output (SISO) (IF) amplifier is proposed too. The idea is to achieve improved bandwidth, and flat response, because these parameters are very important in high frequency applications. Simulation results that obtained by P-SPICE program are 1.2 GHz Bandwidth (BW), 3.4 GHz (gain bandwidth product), 0.5 mW DC consumption power (Pc) and the low total output noise is 12 nV with 1.2 V single supply voltage.
文摘A novel scalable model of substrate components for deep n-well (DNW) RF MOSFETs with different number of fingers is presented for the first time. The test structure developed in [1] is employed to directly access the characteristics of the substrate to extract the different substrate components. A methodology is developed to directly extract the parameters for the substrate network from the measured data. By using the measured two-port data of a set of nMOSFETs with different number of fingers, with the DNW in grounded and float configuration, respectively, the parameters of the scalable substrate model are obtained. The method and the substrate model are further verified and validated by matching the measured and simulated output admittances. Excellent agreement up to 40 GHz for configurations in common-source has been achieved.
