A novel super-junction lateral double-diffused metal-oxide semiconductor(SJ-LDMOS) with a partial lightly doped P pillar(PD) is proposed.Firstly,the reduction in the partial P pillar charges ensures the charge balance...A novel super-junction lateral double-diffused metal-oxide semiconductor(SJ-LDMOS) with a partial lightly doped P pillar(PD) is proposed.Firstly,the reduction in the partial P pillar charges ensures the charge balance and suppresses the substrate-assisted depletion effect.Secondly,the new electric field peak produced by the P/P-junction modulates the surface electric field distribution.Both of these result in a high breakdown voltage(BV).In addition,due to the same conduction paths,the specific on-resistance(R on,sp) of the PD SJ-LDMOS is approximately identical to the conventional SJ-LDMOS.Simulation results indicate that the average value of the surface lateral electric field of the PD SJ-LDMOS reaches 20V/μm at a 15μm drift length,resulting in a BV of 300V.展开更多
A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS pro...A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches(SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance(Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage(BV). Compared to a conventional LDMOS(C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 m?·cm^2 to 23.24 m?·cm^2 and the Baliga's figure of merit(FOM) of is 9.07 MW/cm^2.展开更多
E类功率放大器（PA）具有设计简单和高效率的优点,然而频率较高时功率管的寄生输出电容大于E类功率放大器所需的电容,这个寄生输出电容导致E类功率放大器的效率降低。提出一种高频E类功率放大器的设计方法,使用负载牵引得到考虑寄生输...E类功率放大器（PA）具有设计简单和高效率的优点,然而频率较高时功率管的寄生输出电容大于E类功率放大器所需的电容,这个寄生输出电容导致E类功率放大器的效率降低。提出一种高频E类功率放大器的设计方法,使用负载牵引得到考虑寄生输出电容后的最佳负载阻抗,再结合谐波阻抗控制方法设计E类功率放大器。采用飞思卡尔的横向扩散金属氧化物半导体（LDMOS）功率管MRF21010设计了一款工作在930~960 MHz的E类功率放大器。测试数据表明,该功率放大器的输出功率为36.8 d Bm（4.79 W）,具有79.4%的功率附加效率。展开更多
基于功率放大器(PA)效率提高技术,设计了一套包络跟踪(ET)功率放大器系统,射频(RF)功率放大器的漏极采用三电位G类结构的包络跟踪放大器提供自适应电压偏置,包络放大器包含两个自主设计的横向双扩散晶体管(LDMOS)开关管,RF功率放大器采...基于功率放大器(PA)效率提高技术,设计了一套包络跟踪(ET)功率放大器系统,射频(RF)功率放大器的漏极采用三电位G类结构的包络跟踪放大器提供自适应电压偏置,包络放大器包含两个自主设计的横向双扩散晶体管(LDMOS)开关管,RF功率放大器采用自主研发的LDMOS功率放大管进行优化匹配设计。在连续波(CW)信号激励下,28 V恒定电压下测得功率放大器在2.11 GHz下饱和输出功率为40 d Bm,饱和漏极效率为51%,输出功率回退8 d B时的漏极效率为22%,采用包络跟踪后提高至40%。在8 d B峰均比(PAR)WCDMA信号激励下,28 V恒定电压下测得功率放大器的平均效率为21%,采用包络跟踪后提高至35%。实验结果表明,采用自主设计的LDMOS开关管和LDMOS功率放大管应用到包络跟踪系统后,功率放大器的效率明显提高,验证了包络跟踪技术的优势和自主设计的LDMOS管芯的优越性。展开更多
基金supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. 2010ZX02201)the National Natural Science Foundation of China (Grant No. 61176069)the National Defense Pre-Research of China (Grant No. 51308020304)
文摘A novel super-junction lateral double-diffused metal-oxide semiconductor(SJ-LDMOS) with a partial lightly doped P pillar(PD) is proposed.Firstly,the reduction in the partial P pillar charges ensures the charge balance and suppresses the substrate-assisted depletion effect.Secondly,the new electric field peak produced by the P/P-junction modulates the surface electric field distribution.Both of these result in a high breakdown voltage(BV).In addition,due to the same conduction paths,the specific on-resistance(R on,sp) of the PD SJ-LDMOS is approximately identical to the conventional SJ-LDMOS.Simulation results indicate that the average value of the surface lateral electric field of the PD SJ-LDMOS reaches 20V/μm at a 15μm drift length,resulting in a BV of 300V.
基金supported by the National Natural Science Foundation of China(Grant No.61464003)the Guangxi Natural Science Foundation,China(Grant Nos.2015GXNSFAA139300 and 2018JJA170010)
文摘A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches(SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance(Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage(BV). Compared to a conventional LDMOS(C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 m?·cm^2 to 23.24 m?·cm^2 and the Baliga's figure of merit(FOM) of is 9.07 MW/cm^2.
文摘E类功率放大器（PA）具有设计简单和高效率的优点,然而频率较高时功率管的寄生输出电容大于E类功率放大器所需的电容,这个寄生输出电容导致E类功率放大器的效率降低。提出一种高频E类功率放大器的设计方法,使用负载牵引得到考虑寄生输出电容后的最佳负载阻抗,再结合谐波阻抗控制方法设计E类功率放大器。采用飞思卡尔的横向扩散金属氧化物半导体（LDMOS）功率管MRF21010设计了一款工作在930~960 MHz的E类功率放大器。测试数据表明,该功率放大器的输出功率为36.8 d Bm（4.79 W）,具有79.4%的功率附加效率。
文摘基于功率放大器(PA)效率提高技术,设计了一套包络跟踪(ET)功率放大器系统,射频(RF)功率放大器的漏极采用三电位G类结构的包络跟踪放大器提供自适应电压偏置,包络放大器包含两个自主设计的横向双扩散晶体管(LDMOS)开关管,RF功率放大器采用自主研发的LDMOS功率放大管进行优化匹配设计。在连续波(CW)信号激励下,28 V恒定电压下测得功率放大器在2.11 GHz下饱和输出功率为40 d Bm,饱和漏极效率为51%,输出功率回退8 d B时的漏极效率为22%,采用包络跟踪后提高至40%。在8 d B峰均比(PAR)WCDMA信号激励下,28 V恒定电压下测得功率放大器的平均效率为21%,采用包络跟踪后提高至35%。实验结果表明,采用自主设计的LDMOS开关管和LDMOS功率放大管应用到包络跟踪系统后,功率放大器的效率明显提高,验证了包络跟踪技术的优势和自主设计的LDMOS管芯的优越性。
