The discovery of two-dimensional(2D)semiconductor has opened up new avenues for the development of short-channel field-effect transistors(FETs)with desired electrical performance.Among them,orthorhombic tin-selenide(S...The discovery of two-dimensional(2D)semiconductor has opened up new avenues for the development of short-channel field-effect transistors(FETs)with desired electrical performance.Among them,orthorhombic tin-selenide(SnSe)has garnered increasing attention due to its potential applications in a variety of electronic,optoelectronic,and thermoelectric devices.However,the realization of high-performance SnSe FETs with low contact resistance(Rc)remains a challenge.Herein,we systematically investigate the contact of few-layer SnSe FETs through the modulation of native oxide on SnSe by using different metals.It is found that chromium(Cr)-contacted devices possess the best FET performance,such as electron mobility up to 606 cm^(2)/(V·s)at 78 K,current on/off ratio exceeding 1010,and saturation current of~550μA/μm,where a negligible Schottky barrier(SB)of~30 meV and a low contact resistance of~425Ωμm are achieved.X-ray photoelectron spectroscopy(XPS)and cross-sectional electron dispersive X-ray spectroscopy(EDX)results further reveal that the improved contact arises from the Cr-induced reduction of native oxide(SnOx)to Sn,which thins the tunneling barrier for efficient electron injection.Our findings provide a deep insight into the 2D-metal contact of SnSe and pave the way for its applications in future nanoelectronics.展开更多
Native dejects in HfSiO4 are investigated by first principles calculations. Transition levels of native detects can be accurately described by employing the nonlocal HSE06 hybrid functional. This methodology overcomes...Native dejects in HfSiO4 are investigated by first principles calculations. Transition levels of native detects can be accurately described by employing the nonlocal HSE06 hybrid functional. This methodology overcomes the band gap problem in traditional functionals. By band alignments among the Si, GaAs and HfSiO4. we are able to determine the position of defect levels in Si and GaAs relative to the HfSiO4 band gap. We evaluate the. possibility of these defects acting as fixed charge. Native defects lead to the change of valence and conduction band offsets. Gate leakage current is evaluated by the band offset. In addition, we also investigate diffusions of native defects, and discuss how they affect the MOS device performance.展开更多
Pulsed anodic oxidation technique, a new way of forming current blocking layers, was successfully used in ridge-waveguide QW laser fabrication. This method was applied in 980 nm VCSELs fabrication to form a high-quali...Pulsed anodic oxidation technique, a new way of forming current blocking layers, was successfully used in ridge-waveguide QW laser fabrication. This method was applied in 980 nm VCSELs fabrication to form a high-quality native oxide current blocking layer, which simplifies the device process. A significant reduction of threshold current and a distinguished device performance are achieved. The 500 μm diameter device has a current threshold as low as 0.48 W. The maximum CW operation output power at room temperature is 1.48 W. The lateral divergence angle θ‖ and vertical divergence angle θ⊥ are as low as 15.3° and 13.8° without side-lobes at a current of 6 A.展开更多
基金support from the National Natural Science Foundation of China(Nos.62004128 and 61874074)the Fundamental Research Foundation of Shenzhen(No.JCYJ20190808152607389)+1 种基金the Science and Technology Project of Shenzhen(No.JCYJ20220531100815034)H.N.L.acknowledges the Guangdong Basic and Applied Basic Research Foundation(No.2022A1515012055).
文摘The discovery of two-dimensional(2D)semiconductor has opened up new avenues for the development of short-channel field-effect transistors(FETs)with desired electrical performance.Among them,orthorhombic tin-selenide(SnSe)has garnered increasing attention due to its potential applications in a variety of electronic,optoelectronic,and thermoelectric devices.However,the realization of high-performance SnSe FETs with low contact resistance(Rc)remains a challenge.Herein,we systematically investigate the contact of few-layer SnSe FETs through the modulation of native oxide on SnSe by using different metals.It is found that chromium(Cr)-contacted devices possess the best FET performance,such as electron mobility up to 606 cm^(2)/(V·s)at 78 K,current on/off ratio exceeding 1010,and saturation current of~550μA/μm,where a negligible Schottky barrier(SB)of~30 meV and a low contact resistance of~425Ωμm are achieved.X-ray photoelectron spectroscopy(XPS)and cross-sectional electron dispersive X-ray spectroscopy(EDX)results further reveal that the improved contact arises from the Cr-induced reduction of native oxide(SnOx)to Sn,which thins the tunneling barrier for efficient electron injection.Our findings provide a deep insight into the 2D-metal contact of SnSe and pave the way for its applications in future nanoelectronics.
基金Supported by the Science Foundation from Education Department of Liaoning Province under Grant No L2014445
文摘Native dejects in HfSiO4 are investigated by first principles calculations. Transition levels of native detects can be accurately described by employing the nonlocal HSE06 hybrid functional. This methodology overcomes the band gap problem in traditional functionals. By band alignments among the Si, GaAs and HfSiO4. we are able to determine the position of defect levels in Si and GaAs relative to the HfSiO4 band gap. We evaluate the. possibility of these defects acting as fixed charge. Native defects lead to the change of valence and conduction band offsets. Gate leakage current is evaluated by the band offset. In addition, we also investigate diffusions of native defects, and discuss how they affect the MOS device performance.
文摘Pulsed anodic oxidation technique, a new way of forming current blocking layers, was successfully used in ridge-waveguide QW laser fabrication. This method was applied in 980 nm VCSELs fabrication to form a high-quality native oxide current blocking layer, which simplifies the device process. A significant reduction of threshold current and a distinguished device performance are achieved. The 500 μm diameter device has a current threshold as low as 0.48 W. The maximum CW operation output power at room temperature is 1.48 W. The lateral divergence angle θ‖ and vertical divergence angle θ⊥ are as low as 15.3° and 13.8° without side-lobes at a current of 6 A.
