Hardware Neural Networks Controlled MEMS Rotational Actuators and Application to Micro Robot

Hardware neural networks controlled rotational actuators and application to an insect type micro robot are reported in this paper. Millimeter size rotational actuators are fabricated by combining MEMS （Micro Electro Mechanical System） technology and shape memory alloy based artificial muscle wires. The actuator is composed of a pair of disk rotators and each rotor is suspended by four artificial muscle wires that are connected to the silicon frame. The rotational motion is generated by flowing the electrical current to each wire successively. Two actuators of different sizes are fabricated. The large actuator shows the displacement of 0.5 mm at the cycle time of 4 s. The small actuator shows 0.3 mm at 2 s. For controlling the actuator, the hardware neural networks are used. The hardware neural networks are composed of electrical circuits imitating cell bodies, excitatory synapses and inhibitory synapses. Four signal ports are extracted from four pairs of excitatory and inhibitory neurons and they are connected to the actuator. The small actuator is applied to the robot and built in the mid body of the robot. The shaft of the actuator is connected to the link mechanisms that transform the rotational motion to the locomotion. The appearance dimensions of the robot are 4.0, 2.7, 2.5 mm width, length and height. The robot performs forward and backward foot step like insects. The speed is 26.4 mm·min^-1 and the stepping width is 0.88 mm. Also, the robot changes the direction by external trigger pulses.

Neuromorphic circuits based on memristors: endowing robots with a human-like brain

Robots are widely used,providing significant convenience in daily life and production.With the rapid development of artificial intelligence and neuromorphic computing in recent years,the realization of more intelligent robots through a pro-found intersection of neuroscience and robotics has received much attention.Neuromorphic circuits based on memristors used to construct hardware neural networks have proved to be a promising solution of shattering traditional control limita-tions in the field of robot control,showcasing characteristics that enhance robot intelligence,speed,and energy efficiency.Start-ing with introducing the working mechanism of memristors and peripheral circuit design,this review gives a comprehensive analysis on the biomimetic information processing and biomimetic driving operations achieved through the utilization of neuro-morphic circuits in brain-like control.Four hardware neural network approaches,including digital-analog hybrid circuit design,novel device structure design,multi-regulation mechanism,and crossbar array,are summarized,which can well simulate the motor decision-making mechanism,multi-information integration and parallel control of brain at the hardware level.It will be definitely conductive to promote the application of memristor-based neuromorphic circuits in areas such as intelligent robotics,artificial intelligence,and neural computing.Finally,a conclusion and future prospects are discussed.

Recent advances in efficient computation of deep convolutional neural networks

Deep neural networks have evolved remarkably over the past few years and they are currently the fundamental tools of many intelligent systems.At the same time,the computational complexity and resource consumption of these networks continue to increase.This poses a significant challenge to the deployment of such networks,especially in real-time applications or on resource-limited devices.Thus,network acceleration has become a hot topic within the deep learning community.As for hardware implementation of deep neural networks,a batch of accelerators based on a field-programmable gate array(FPGA) or an application-specific integrated circuit(ASIC)have been proposed in recent years.In this paper,we provide a comprehensive survey of recent advances in network acceleration,compression,and accelerator design from both algorithm and hardware points of view.Specifically,we provide a thorough analysis of each of the following topics:network pruning,low-rank approximation,network quantization,teacher–student networks,compact network design,and hardware accelerators.Finally,we introduce and discuss a few possible future directions.