This paper proposes a novel SVPWM （space vector pulse width modulation） strategy for the three-level neutral-point-clamped voltage source inverter, based on the particular disposition of all the redundant voltage ve...This paper proposes a novel SVPWM （space vector pulse width modulation） strategy for the three-level neutral-point-clamped voltage source inverter, based on the particular disposition of all the redundant voltage vectors. The new modulation approach shows superior performance for harmonic voltage and balancing control of neutral-point potential compared to the popular eight-stage centered SVPWM. It realizes suppression of inverter neutral-point potential variation by accurately modifying redundant factor of small vectors pairs, only requiring information of DC-link capacitor voltages and three-phase load currents. This is convenient to apply and is compatible of digital computer realization. Feasibility of the proposed control approach is verified by simulation and experimental results.展开更多
Capacitor voltage imbalance is a significant problem for three-level inverters.Due to the mid-point modulation of these inverter topologies,the neutral point potential moves up or down depending on the neutral point c...Capacitor voltage imbalance is a significant problem for three-level inverters.Due to the mid-point modulation of these inverter topologies,the neutral point potential moves up or down depending on the neutral point current direction creating imbalanced voltages among the two capacitors.This imbalanced capacitor voltage causes imbalanced voltage stress among the semiconductor devices and causes increase output voltage and current harmonics.This paper introduces a modified voltage balancing strategy using two-level space vector modulation.By decomposing the three-level space vector diagram into two-level space vector diagram and redistributing the dwell times of the two-level zero space vectors,the modified voltage balancing method ensures minimal NP voltage ripple.Compared to the commonly used NP voltage control method(using 3L SVM[9]),the proposed modified NP voltage control method offers a slightly higher neutral-point voltage ripple and output voltage harmonics but,it has much lower switching loss,code size and execution time.展开更多
The topology of diode neutral-point-clamped(NPC)three-level inverter is prone to neutral-point potential offset.When the sum of three-phase current is zero,the virtual space vector pulse width modulation(VSVPWM)scheme...The topology of diode neutral-point-clamped(NPC)three-level inverter is prone to neutral-point potential offset.When the sum of three-phase current is zero,the virtual space vector pulse width modulation(VSVPWM)scheme does not cause the neutral-point voltage offset,but it lacks the ability to balance the deviation.For this reason,a neutral-point potential control strategy combining virtual space vector modulation and loop width control is proposed.The neutral-point potential is balanced by introducing the distribution factor for the regions with redundant vectors.For other regions,the potential is controlled by selecting a suitable switching sequence.Meanwhile,the effect on the virtual vector modulation is reduced within the loop width by setting an appropriate loop width,thereby improving the balance effect.The simulation results show that the proposed method has a strong ability to control the offset and has excellent potential balance performance under the conditions of balanced load,unbalanced load and asymmetric capacitance parameters.展开更多
A comprehensive predictive strategy was proposed for the neutral-point balancing control of back-to-back three-level converters. The phase currents at both sides and the DC-link capacitor voltages were measured for th...A comprehensive predictive strategy was proposed for the neutral-point balancing control of back-to-back three-level converters. The phase currents at both sides and the DC-link capacitor voltages were measured for the prediction of the neutral-point current. A quality function was found to balance the neutral-point, and a metabolic on-times distribution factor was used as a predicator to minimize the quality function at each switching state. Simulation results show that the proposed method produces smaller ripples in tested signals compared with the established one, namely, 9.15% less in a total harmonic distortion(THD) of line-to-line voltage, 1.08% less in the THD of phase current, and 0.9 V less in the ripple of the neutral-point voltage. The obtained experimental results show that the main harmonics of the line-to-line voltage and the phase current in the proposed method are improved by 10 d B and 6 d B, respectively, and the ripple of neutral-point voltage is halved compared to the established one.展开更多
In this paper, parameter plane synthesis of a three-phase neutral-point clamped bidirectional rectifier has been performed. The converter involves one outer-loop PI voltage controller and two inner-loop PI current con...In this paper, parameter plane synthesis of a three-phase neutral-point clamped bidirectional rectifier has been performed. The converter involves one outer-loop PI voltage controller and two inner-loop PI current controllers for the closed-loop control. D-partition technique has been employed for the precise design of the voltage controller. The performance of the converter has been evaluated using MATLAB/Simulink software. An experimental prototype of converter has been developed and the experimental investigation of converter in closed-loop has been carried out. DSP DS 1104 of dSPACE has been used for real-time implementation of the designed controller. The performance of the converter has been found satisfactory using the designed controller parameters.展开更多
文摘This paper proposes a novel SVPWM （space vector pulse width modulation） strategy for the three-level neutral-point-clamped voltage source inverter, based on the particular disposition of all the redundant voltage vectors. The new modulation approach shows superior performance for harmonic voltage and balancing control of neutral-point potential compared to the popular eight-stage centered SVPWM. It realizes suppression of inverter neutral-point potential variation by accurately modifying redundant factor of small vectors pairs, only requiring information of DC-link capacitor voltages and three-phase load currents. This is convenient to apply and is compatible of digital computer realization. Feasibility of the proposed control approach is verified by simulation and experimental results.
文摘Capacitor voltage imbalance is a significant problem for three-level inverters.Due to the mid-point modulation of these inverter topologies,the neutral point potential moves up or down depending on the neutral point current direction creating imbalanced voltages among the two capacitors.This imbalanced capacitor voltage causes imbalanced voltage stress among the semiconductor devices and causes increase output voltage and current harmonics.This paper introduces a modified voltage balancing strategy using two-level space vector modulation.By decomposing the three-level space vector diagram into two-level space vector diagram and redistributing the dwell times of the two-level zero space vectors,the modified voltage balancing method ensures minimal NP voltage ripple.Compared to the commonly used NP voltage control method(using 3L SVM[9]),the proposed modified NP voltage control method offers a slightly higher neutral-point voltage ripple and output voltage harmonics but,it has much lower switching loss,code size and execution time.
基金National Natural Science Foundation of China(No.61761027)Postgraduate Education Reform Project of Lanzhou Jiaotong University(No.1600120101)
文摘The topology of diode neutral-point-clamped(NPC)three-level inverter is prone to neutral-point potential offset.When the sum of three-phase current is zero,the virtual space vector pulse width modulation(VSVPWM)scheme does not cause the neutral-point voltage offset,but it lacks the ability to balance the deviation.For this reason,a neutral-point potential control strategy combining virtual space vector modulation and loop width control is proposed.The neutral-point potential is balanced by introducing the distribution factor for the regions with redundant vectors.For other regions,the potential is controlled by selecting a suitable switching sequence.Meanwhile,the effect on the virtual vector modulation is reduced within the loop width by setting an appropriate loop width,thereby improving the balance effect.The simulation results show that the proposed method has a strong ability to control the offset and has excellent potential balance performance under the conditions of balanced load,unbalanced load and asymmetric capacitance parameters.
基金Project(61074018)supported by the National Natural Science Foundation of ChinaProject(2012kfjj06)supported by Hunan Province Key Laboratory of Smart Grids Operation and Control(Changsha University of Science and Technology),China
文摘A comprehensive predictive strategy was proposed for the neutral-point balancing control of back-to-back three-level converters. The phase currents at both sides and the DC-link capacitor voltages were measured for the prediction of the neutral-point current. A quality function was found to balance the neutral-point, and a metabolic on-times distribution factor was used as a predicator to minimize the quality function at each switching state. Simulation results show that the proposed method produces smaller ripples in tested signals compared with the established one, namely, 9.15% less in a total harmonic distortion(THD) of line-to-line voltage, 1.08% less in the THD of phase current, and 0.9 V less in the ripple of the neutral-point voltage. The obtained experimental results show that the main harmonics of the line-to-line voltage and the phase current in the proposed method are improved by 10 d B and 6 d B, respectively, and the ripple of neutral-point voltage is halved compared to the established one.
文摘In this paper, parameter plane synthesis of a three-phase neutral-point clamped bidirectional rectifier has been performed. The converter involves one outer-loop PI voltage controller and two inner-loop PI current controllers for the closed-loop control. D-partition technique has been employed for the precise design of the voltage controller. The performance of the converter has been evaluated using MATLAB/Simulink software. An experimental prototype of converter has been developed and the experimental investigation of converter in closed-loop has been carried out. DSP DS 1104 of dSPACE has been used for real-time implementation of the designed controller. The performance of the converter has been found satisfactory using the designed controller parameters.
