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An 11-bit ENOB,accuracy-programmable,and non-calibrating time-mode SAR ADC
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作者 樊华 韩雪 +1 位作者 魏琦 杨华中 《Journal of Semiconductors》 EI CAS CSCD 2013年第1期118-128,共11页
A 10 or 12 bit programmable successive approximation register(SAR) ADC incorporating improved time-domain comparator for bridge stress monitoring systems is presented.Techniques for improving the accuracy of time-do... A 10 or 12 bit programmable successive approximation register(SAR) ADC incorporating improved time-domain comparator for bridge stress monitoring systems is presented.Techniques for improving the accuracy of time-domain comparator are presented.The application of these approaches is illustrated using results from an experimental 10 or 12 bit programmable SAR ADC.Prototyped in a 0.18-m,6M1P CMOS process,the ADC,at 12 bit,100 kS/s,achieves a Nyquist signal-to-noise-plus-distortion ratio(SNDR) of 68 dB(11 ENOB),a spurious free dynamic range(SFDR) of 77.48 dB,while dissipating 558 W from a 1.8-V supply.Its differential nonlinearity(DNL) and integral nonlinearity(INL) are 0.2/-0.74 LSB and C1.27/-0.97 LSB,respectively. 展开更多
关键词 analog-to-digital converter(ADC) non-calibrating successive approximation register(SAR)
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