On-Chip Micro Temperature Controllers Based on Freestanding Thermoelectric Nano Films for Low-Power Electronics

Multidimensional integration and multifunctional com-ponent assembly have been greatly explored in recent years to extend Moore’s Law of modern microelectronics.However,this inevitably exac-erbates the inhomogeneity of temperature distribution in microsystems,making precise temperature control for electronic components extremely challenging.Herein,we report an on-chip micro temperature controller including a pair of thermoelectric legs with a total area of 50×50μm^(2),which are fabricated from dense and flat freestanding Bi2Te3-based ther-moelectric nano films deposited on a newly developed nano graphene oxide membrane substrate.Its tunable equivalent thermal resistance is controlled by electrical currents to achieve energy-efficient temperature control for low-power electronics.A large cooling temperature difference of 44.5 K at 380 K is achieved with a power consumption of only 445μW,resulting in an ultrahigh temperature control capability over 100 K mW^(-1).Moreover,an ultra-fast cooling rate exceeding 2000 K s^(-1) and excellent reliability of up to 1 million cycles are observed.Our proposed on-chip temperature controller is expected to enable further miniaturization and multifunctional integration on a single chip for microelectronics.

High-intensity spatial-mode steerable frequency up-converter toward on-chip integration

Integrated photonic devices are essential for on-chip optical communication,optical-electronic systems,and quantum information sciences.To develop a high-fidelity interface between photonics in various frequency domains without disturbing their quantum properties,nonlinear frequency conversion,typically steered with the quadratic(χ2)process,should be considered.Furthermore,another degree of freedom in steering the spatial modes during theχ2 process,with unprecedent mode intensity is proposed here by modulating the lithium niobate(LN)waveguide-based inter-mode quasi-phasematching conditions with both temperature and wavelength parameters.Under high incident light intensities(25 and 27.8 dBm for the pump and the signal lights,respectively),mode conversion at the sum-frequency wavelength with sufficient high output power(−7–8 dBm)among the TM01,TM10,and TM00 modes is realized automatically with characterized broad temperature(ΔT≥8°C)and wavelength windows(Δλ≥1 nm),avoiding the previous efforts in carefully preparing the signal or pump modes.The results prove that high-intensity spatial modes can be prepared at arbitrary transparent wavelength of theχ2 media toward on-chip integration,which facilitates the development of chip-based communication and quantum information systems because spatial correlations can be applied to generate hyperentangled states and provide additional robustness in quantum error correction with the extended Hilbert space.

Mode evolution and nanofocusing of grating-coupled surface plasmon polaritons on metallic tip

We present a detailed analysis on mode evolution of gratingcoupled surface plasmonic polaritons （SPPs） on a conical metal tip based on the guidedwave theory. The eigenvalue equations for SPPs modes are discussed, revealing that cylindrical metal waveguides only support TM01 and HEm1 surface modes. During propagation on the metal tip, the gratingcoupled SPPs are converted to HE31, HE21, HE11 and TM01 successively, and these modes are sequentially cut off except TM01. The TM01 mode further propagates with drastically increasing effective mode index and is converted to localized surface plasmons （LSPs） at the tip apex, which is responsible for plasmonic nanofocusing. The gapmode plasmons can be excited with the focusing TM01 mode by approaching a metal substrate to the tip apex, resulting in further enhanced electric field and reduced size of the plasmonic focus.

Delay and Energy Efficient Design of an On-Chip Bus with Repeaters Using a New Spatial and Temporal Encoding Technique

On-chip global buses in deep sub-micron designs consume significant amounts of energy and have large propagation delays. Thus, minimizing energy dissipation and propagation delay is an important design objective. In this paper, we propose a new spatial and temporal encoding approach for generic on-chip global buses with repeaters that enables higher performance while reducing peak energy and average energy. The proposed encoding approach exploits the benefits of a temporal encoding circuit and spatial bus-invert coding techniques to simultaneously eliminate opposite transitions on adjacent wires and reduce the number of self-transitions and coupling-transitions. In the design process of applying encoding techniques for reduced bus delay and energy, we present a repeater insertion design methodology to determine the repeater size and inter-repeater bus length, which minimizes the total bus energy dissipation while satisfying target delay and slew-rate constraints. This methodology is employed to obtain optimal energy versus delay trade-offs under slew-rate constraints for various encoding techniques.

Patterned Dual pn Junctions Restraining Substrate Loss of an On-Chip Inductor

Dual pn junctions in lateral and vertical directions are formed by diffusing the p^＋ on the patterned n-well in standard CMOS technology, which are inserted under the inductor in order to reduce the currents in the substrate induced by the electromagnetic field from the inductor. The thickness of high resistance is not equivalent to the width of the depletion region of the vertical pn junctions,but the depth of the bottom pn junction in the substrate are both proposed and validated. For the first time, through the grounded p^＋-diffusion layer shielding the suhstrate from the electric field of the inductor, the width of the depletion regions of the lateral and vertical pn junctions are changed by increasing the voltage applied to the n wells. The quality factor is improved or reduced with the thickness of high resistance by 19%. This phenomenon validates the theory that the pn junction substrate isolation can reduce the loss caused by the currents in the substrate induced by the electromagnetic field from the inductor.

Robust optical mode converter based on topological waveguide arrays

Optical mode converters are essential for enhancing the capacity of optical communication systems. However, fabrication errors restrict the further improvement of conventional mode converters. To address this challenge, we have designed an on-chip TE0–TE1mode converter based on topologically protected waveguide arrays. The simulation results demonstrate that the converter exhibits a mode coupling efficiency of 93.5% near 1550 nm and can tolerate a relative fabrication error of 30%. Our design approach can be extended to enhance the robustness for other integrated photonic devices, beneficial for future development of optical network systems.

The hard X-ray nanoprobe beamline at the SSRF

The hard X-ray nanoprobe beamline BL13U is a phase-Ⅱ beamline project at the Shanghai Synchrotron Radiation Facility.The beamline aims to enable comprehensive experiments at high spatial resolutions ranging from 50 to 10 nm. The X-ray energy range of the beamline, 5–25 keV, can detect most elements in the periodic table. Two operating modes were designed to accommodate the experimental requirements of high-energy resolution or high photon flux, respectively. X-ray nanofluorescence, nanodiffraction, and coherent diffraction imaging are developed as the main experimental techniques for BL13U. This paper describes the beamline optics, end station configurations, experimental methods under development, and preliminary test results. This comprehensive overview aims to provide a clear understanding of the beamline capabilities and potential applications.

On-chip readout plasmonic mid-IR gas sensor

Gas identification and concentration measurements are important for both understanding and monitoring a variety of phenomena from industrial processes to environmental change.Here a novel mid-IR plasmonic gas sensor with on-chip direct readout is proposed based on unity integration of narrowband spectral response,localized field enhancement and thermal detection.A systematic investigation consisting of both optical and thermal simulations for gas sensing is presented for the first time in three sensing modes including refractive index sensing,absorption sensing and spectroscopy,respectively.It is found that a detection limit less than 100 ppm for CO2 could be realized by a combination of surface plasmon resonance enhancement and metal-organic framework gas enrichment with an enhancement factor over 8000 in an ultracompact optical interaction length of only several microns.Moreover,on-chip spectroscopy is demonstrated with the compressive sensing algorithm via a narrowband plasmonic sensor array.An array of 80 such sensors with an average resonance linewidth of 10 nm reconstructs the CO2 molecular absorption spectrum with the estimated resolution of approximately 0.01 nm far beyond the state-of-the-art spectrometer.The novel device design and analytical method are expected to provide a promising technique for extensive applications of distributed or portable mid-IR gas sensor.

Design Aspects of CMOS Compatible On-Chip Antenna for Applications of Contact-Less Smart Card

Design aspects of CMOS compatible on-chip antenna for applications of contact-less smart card are discussed.An on-chip antenna model is established and a design method is demonstrated.Experimental results show that system-on-chip integrating power reception together with other electronic functions of smart card applications is feasible.In a 6×10 -4T magnetic field of 22.5MHz,an on-chip power of 1.225mW for a 10kΩ load is obtained using a 4mm2 on-chip antenna.

Development of series SQUID array with on-chip filter for TES detector

A cold preamplifier based on superconducting quantum interference devices(SQUIDs)is currently the preferred readout technology for the low-noise transition edge sensor(TES).In this work,we have designed and fabricated a series SQUID array(SSA)amplifier for the TES detector readout circuit.In this SSA amplifier,each SQUID cell is composed of a first-order gradiometer formed using two equally large square washers,and an on-chip low pass filter(LPF)as a radiofrequency(RF)choke has been developed to reduce the Josephson oscillation interference between individual SQUID cells.In addition,a highly symmetric layout has been designed carefully to provide a fully consistent embedded electromagnetic environment and achieve coherent flux operation.The measured results show smooth V-Φcharacteristics and a swing voltage that increases linearly with increasing SQUID cell number N.A white flux noise level as low as 0.28μφ;/Hz;is achieved at 0.1 K,corresponding to a low current noise level of 7 pA/Hz;.We analyze the measured noise contribution at mK-scale temperatures and find that the dominant noise derives from a combination of the SSA intrinsic noise and the equivalent current noise of the room temperature electronics.

On-Chip Inductor Technique for Improving LNA Performance Operating at 15 GHz

This paper presents a technique for low noise figure reduction of low-noise amplifier (LNA). The proposed LNA is designed in a source degeneration technique that offers lower noise figure. The resistance of the on-chip inductor is reduced by using multilayer that significantly reduces the thermal noise due to spiral inductor. Also, using spiral inductor as a gate inductor reduces the effect of the input parasitic capacitance on the noise figure and provides a good matching at the input and output of the LNA. The results of the LNA using multilayer on-chip inductor compared will off-chip inductor have been illustrated. It shows that the proposed technique reduces significantly the noise figure and improves the matching. The proposed LNA is designed in 0.13 μm process with 1.3 V supply voltage and simulated using Advanced Design System (ADS) software. The simulation results show that the LNA is unconditionally stable and provides a forward gain of 11.087 dB at operating frequency of 15 GHz with 1.784 dB noise figure and input and output impedance matching of –17.93 dB, and –10.04 dB.

Design of an unbuffered switch for network on-chip

In the complex multicore chip system,network on-chip(NoC)is viewed as a kind of system interconnection that can substitute the traditional interconnect networks,which will improve the system performance and communication efficiency.With regard to the complex and large scale NoC,simple and efficient routing nodes are the critical factors to achieve low-cost and low-congestion communication performance.This paper proposes an unbuffered switch architecture and makes detailed analysis of the mechanism of buffer in the switch architecture.According to the simulation results,the S-mesh using the unbuffered switch architecture is better in terms of the optimal performance in message latency than some typical NoC architectures,such as 2D-mesh,Fat-tree,Butterfly,Octagon and so on.The synthesis results of design compiler indicate that the unbuffered switch has obvious advantages of achieving cost and operating speed for the chips.

On-Chip Capillary Electrophoresis (Chip-CE) with Optical On-Chip Leaky-Waveguide-Based Detection

Capillary electrophoresis (CE) suffers from a relatively small sensitivity—at least in case of optical detection transversely to the capillary axis due to the small capillary inner diameters in the range of 50 - 100 μm. Different concepts like bubble, U-, or Z-cells have been used to tackle that problem already in the nineties of the last century. But the U- and Z-cells have typically been extra cells with larger inner channel diameters and no optimization for optical waveguiding and the bubble cell per se did not allow for optical waveguiding. In the case of on-chip capillary electrophoresis (chip-CE) a U-cell can be implemented quite easily on the chip. Here we show how leaky optical waveguiding can be employed to improve optical detection. Proper U-channel design and preparation by wet-chemical etching of the fused silica sub- and superstrate, making the U-channel bend a part of the optical input lens system, can help to achieve high coupling efficiency with loss coefficients around 2 dB and low waveguiding loss.

A Single Mode Hybrid Ⅲ-Ⅴ/Silicon On-Chip Laser Based on Flip-Chip Bonding Technology for Optical Interconnection

A single mode hybrid Ⅲ-Ⅴ/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry-Perot laser structure with micro-structures on an InP ridge waveguide is designed and fabricated on an InP/AIGaInAs multiple quantum well epitaxial layer structure wafer by using i-line lithography. Then, a silicon waveguide platform including a laser mounting stage is designed and fabricated on a silicon-on-insulator substrate. The single mode laser is flip-chip bonded on the laser mounting stage. The lasing light is butt-coupling to the silicon waveguide. The laser power output from a silicon waveguide is 1.3roW, and the threshold is 37mA at room temperature and continuous wave operation.

Area Analysis for On-chip Routers with Different Data-link Widths

Compared with the traditional and inter-chip networks, on-chip networks （NoCs） have enormous wire resources which can be traded for improving other performance requirements. This means that much wider data links can be used for NoCs. This paper focuses on the area costs for on-chip routers under four different data-link widths： 8 bits, 16 bits, 128 bits, and 256bits. Firstly, a virtual-channel based on-chip router is introduced. Secondly, the components of the router are implemented by Verilog HDL models and synthesized by Quartus II 4.0 in a FPGA device. Finally, the area costs are analyzed. It can be seen from the results that data-link width has great influence on area costs of buffers and crossbar while has no influence on area costs of arbiter.

辉门动力总成携手NanoFocus AG研发创新型非接触式活塞环测量系统

辉门动力总成携手NanoFocus AG研发一种用于测量活塞环粗糙度和微观结构的非接触式光学共聚焦自动测量系统。该系统结合NanoFocus光学测量系统、软件及辉门活塞环产品数据库,能够帮助公司在位于德国布尔沙伊德的工厂生产活塞环时,加强生产控制与质量保证。

Waveguide-integrated optical modulators with two-dimensional materials

Waveguide-integrated optical modulators are indispensable for on-chip optical interconnects and optical computing.To cope with the ever-increasing amount of data being generated and consumed,ultrafast waveguide-integrated optical modulators with low energy consumption are highly demanded.In recent years,two-dimensional(2D)materials have attracted a lot of attention and have provided tremendous opportunities for the development of high-performance waveguide-integrated optical modulators because of their extraordinary optoelectronic properties and versatile compatibility.This paper reviews the state-of-the-art waveguide-integrated optical modulators with 2D materials,providing researchers with the developing trends in the field and allowing them to identify existing challenges and promising potential solutions.First,the concept and fundamental mechanisms of optical modulation with 2D materials are summarized.Second,a review of waveguide-integrated optical modulators employing electro-optic,all-optic,and thermo-optic effects is provided.Finally,the challenges and perspectives of waveguide-integrated modulators with 2D materials are discussed.

High-resolution portable lens-free on-chip microscopy with RGB LED via pinhole array

Lens-free on-chip microscopy with RGB LEDs(LFOCM-RGB)provides a portable,cost-effective,and high-throughput imaging tool for resource-limited environments.However,the weak coherence of LEDs limits the high-resolution imaging,and the luminous surfaces of the LED chips on the RGB LED do not overlap,making the coherence-enhanced executions tend to undermine the portable and cost-effective implementation.Here,we propose a specially designed pinhole array to enhance coherence in a portable and cost-effective implementation.It modulates the three-color beams from the RGB LED separately so that the three-color beams effectively overlap on the sample plane while reducing the effective light-emitting area for better spatial coherence.The separate modulation of the spatial coherence allows the temporal coherence to be modulated separately by single spectral filters rather than by expensive triple spectral filters.Based on the pinhole array,the LFOCM-RGB simply and effectively realizes the high-resolution imaging in a portable and cost-effective implementation,offering much flexibility for various applications in resource-limited environments.

Harpoon-shaped topological photonic crystal for on-chip beam splitter

The advancement of integrated optical communication networks necessitates the deployment of on-chip beam splitters for efficient signal interconnections at network nodes.However,the pursuit of micron-scale beam splitting with large corners and reducing the device footprint to boost connection flexibility often results in phase mismatches.These mismatches,which stem from radiation modes and backward scattering,pose significant obstacles in creating highly integrated and interference-resistant connections.To address this,we introduce a solution based on the topological valley-contrasting state generated by photonic crystals with opposing valley Chern numbers,manifested in a harpoon-shaped structure designed to steer the splitting channels.This approach enables adiabatic mode field evolution over large corners,capitalizing on the robust phase modulation capabilities and topological protection provided by the subwavelength-scale valley-contrasting state.Our demonstration reveals that beam splitters with large corners of 60°,90°,and 120°exhibit insertion loss fluctuations below 2.7 dB while maintaining a minimal footprint of 8.8μm×8.8μm.As a practical demonstration,these devices facilitate three-channel signal connections,successfully transmitting quadrature phase shift keying signals at 3.66 Tbit/s with bit error rates below the forward error correction threshold,demonstrating performance comparable to that in defects scenarios.By harnessing the unidirectional excitation feature,we anticipate significant enhancements in the capabilities of signal distribution and connection networks through a daisy chain configuration.

On-Chip Sub-Picometer Continuous Wavelength Fiber-Bragg-Grating Interrogator

Miniaturized fiber-Bragg-grating(FBG)interrogators are of interest for applications in the areas where weight and size controlling is important,e.g.,airplanes and aerospace or in-situ monitoring.An ultra-compact high-precision on-chip interrogator is proposed based on a tailored arrayed waveguide grating(AWG)on a silicon-on-insulator(SOI)platform.The on-chip interrogator enables continuous wavelength interrogation from 1544 nm to 1568 nm with the wavelength accuracy of less than 1 pm[the root-mean-square error(RMSE)is 0.73 pm]over the whole wavelength range.The chip loss is less than 5 dB.The 1×16 AWG is optimized to achieve a large bandwidth and a low noise level at each channel,and the FBG reflection peaks can be detected by multiple output channels of the AWG.The fabricated AWG is utilized to interrogate FBG sensors through the center of gravity(CoG)algorithm.The validation of an on-chip FBG interrogator that works with sub-picometer wavelength accuracy in a broad wavelength range shows large potential for applications in miniaturized fiber optic sensing systems.