Bias dependence of a deep submicron NMOSFET response to total dose irradiation

Deep submicron n-channel metal-oxide-semiconductor field-effect transistors （NMOSFETs） with shallow trench isolation （STI） are exposed to ionizing dose radiation under different bias conditions. The total ionizing dose radiation induced subthreshold leakage current increase and the hump effect under four different irradiation bias conditions including the worst case （ON bias） for the transistors are discussed. The high electric fields at the corners are partly responsible for the subthreshold hump effect. Charge trapped in the isolation oxide, particularly at the Si/SiO2 interface along the sidewalls of the trench oxide creates a leakage path, which becomes a dominant contributor to the offstate drain-to-source leakage current in the NMOSFET. Non-uniform charge distribution is introduced into a threedimensional （3D） simulation. Good agreement between experimental and simulation results is demonstrated. We find that the electric field distribution along with the STI sidewall is important for the radiation effect under different bias conditions.

Total ionizing dose effect in an input/output device for flash memory

Input/output devices for flash memory are exposed to gamma ray irradiation. Total ionizing dose has been shown great influence on characteristic degradation of transistors with different sizes. In this paper, we observed a larger increase of off-state leakage in the short channel device than in long one. However, a larger threshold voltage shift is observed for the narrow width device than for the wide one, which is well known as the radiation induced narrow channel effect. The radiation induced charge in the shallow trench isolation oxide influences the electric field of the narrow channel device. Also, the drain bias dependence of the off-state leakage after irradiation is observed, which is called the radiation enhanced drain induced barrier lowing effect. Finally, we found that substrate bias voltage can suppress the off-state leakage, while leading to more obvious hump effect.

Total ionizing dose radiation effects on NMOS parasitic transistors in advanced bulk CMOS technology devices

In this paper, total ionizing dose effect of NMOS transistors in advanced CMOS technology are exam- ined. The radiation tests are performed at 60Co sources at the dose rate of 50 rad （Si）/s. The investigation＇s results show that the radiation-induced charge buildup in the gate oxide can be ignored, and the field oxide isolation struc- ture is the main total dose problem. The total ionizing dose （TID） radiation effects of field oxide parasitic transistors are studied in detail. An analytical model of radiation defect charge induced by TID damage in field oxide is estab- lished. The I-V characteristics of the NMOS parasitic transistors at different doses are modeled by using a surface potential method. The modeling method is verified by the experimental I V characteristics of 180 nm commer- cial NMOS device induced by TID radiation at different doses. The model results are in good agreement with the radiation experimental results, which shows the analytical model can accurately predict the radiation response characteristics of advanced bulk CMOS technology device.

Gate length dependence of the shallow trench isolation leakage current in an irradiated deep submicron NMOSFET

The effects of gamma irradiation on the shallow trench isolation（STI）leakage currents in a 0.18μm technology are investigated.NMOSFETs with different gate lengths are irradiated at several dose levels.The threshold voltage shift is negligible in all of the devices due to the very thin oxide thickness.However,an increase in the off-state leakage current is observed for all of the devices.We believe that the leakage is induced by the drain-to-source leakage path along the STI sidewall,which is formed by the positive trapped charge in the STI oxide.Also, we found that the leakage is dependent on the device＇s gate length.The three-transistor model（one main transistor with two parasitic transistors）can provide us with a brief understanding of the dependence on gate length.