Evaluation and development of a predictive model for conjugate phase change heat transfer of energy storage system partially filled with porous media

The present study proposes a predictive model to explore the effect of partially filled porous media on the con-jugate heat transfer characteristic of phase change material(PCM)with interfacial coupling conditions between pure fluid region and porous region.The enthalpy-porosity method,local thermal non-equilibrium model and Darcy-Forchheimer law are comprehensively considered to describe the convective heat transfer process in porous media.The modified model is then validated by benchmark data provided by particle image velocimetry(PIV)ex-periments.The phase change behavior,heat transfer efficiency and energy storage performance are numerically investigated for different partial porous filling strategies in terms of filling content,position,height of porous foam and inclination angles of cavity.The results indicate that due to the resistance in porous region,the shear stress exerted by the main vortex(natural convection)in pure fluid region and the momentum transferred,a secondary vortex phenomenon appears in the porous region near the fluid/porous interface.Moreover,such dis-continuity of permeability and fluid-to-porous thermal conductivity results in the cusp of phase change interface at the horizontal fluid/porous boundary.Among four partial porous filling cases,the lower porous filling one has more desirable heat transfer performance,and the 3/4H lower porous filling configuration is the best solution for optimization of the latent heat thermal energy storage(LHTES)systems.For tilted cavity,the increase of inclination angle positively affects the heat transfer efficiency as well as the energy storage rate of the LHTES system,where the performance of 3/4H lower porous filling configuration is further highlighted.

Design and implementation of a programming circuit in radiation-hardened FPGA

We present a novel programming circuit used in our radiation-hardened field programmable gate array （FPGA） chip.This circuit provides the ability to write user-defined configuration data into an FPGA and then read it back.The proposed circuit adopts the direct-access programming point scheme instead of the typical long token shift register chain.It not only saves area but also provides more flexible configuration operations.By configuring the proposed partial configuration control register,our smallest configuration section can be conveniently configured as a single data and a flexible partial configuration can be easily implemented.The hierarchical simulation scheme, optimization of the critical path and the elaborate layout plan make this circuit work well.Also,the radiation hardened by design programming point is introduced.This circuit has been implemented in a static random access memory（SRAM）-based FPGA fabricated by a 0.5μm partial-depletion silicon-on-insulator CMOS process.The function test results of the fabricated chip indicate that this programming circuit successfully realizes the desired functions in the configuration and read-back.Moreover,the radiation test results indicate that the programming circuit has total dose tolerance of 1×10~5 rad（Si）,dose rate survivability of 1.5×10^（11） rad（Si）/s and neutron fluence immunity of 1×10^（14） n/cm^2.