This paper proposes an area-saving dual-path loop filter（LPF）for low-voltage integrated phase-locked loops（PLLs）.With this LPF,output current of the lowpass-path charge-pump（CP）is B times（B〉1）as great as that...This paper proposes an area-saving dual-path loop filter（LPF）for low-voltage integrated phase-locked loops（PLLs）.With this LPF,output current of the lowpass-path charge-pump（CP）is B times（B〉1）as great as that of the integration-path CP.By adding voltages across these two paths,the zero-capacitance is magnified B times equivalently.As a result,the chip size is greatly reduced.Based on this LPF,a 1.2 V 3.5 GHz-band PLL is fabricated in SMIC 0.18μm RFCMOS technology.Its zero-capacitance is only 1/30 of that in conventional second-order LPFs. Measured data show that,at a frequency of 3.20 GHz,phase noise is–120.2 dBc/Hz at 1 MHz offset,reference spur is–72 dBc,and power is 24 mW.展开更多
As a path vector protocol, Border Gateway Protocol （BGP） messages contain an entire Autonomous System （AS） path to each destination for breaking arbitrary long AS path loops. However, after observing the global ro...As a path vector protocol, Border Gateway Protocol （BGP） messages contain an entire Autonomous System （AS） path to each destination for breaking arbitrary long AS path loops. However, after observing the global routing data from RouteViews, we find that BGP AS Path Looping （BAPL） behavior does occur and in fact can lead to multi-AS forwarding loops in both IPv4 and IPv6. The number and ratio of BAPLs in IPv4 and IPv6 on a daily basis from August 1,2011 to August 31, 2015 are analyzed. Moreover, the distribution of BAPLs among duration and loop length in IPv4 and IPv6 are also studied. Several possible explanations for BAPL are discussed in this paper. Private AS Number Leaking （PANL） has contributed to 0.20% of BAPLs in IPv4, and at least 1.76% of BAPLs in IPv4 were attributed to faulty configurations and malicious attacks. Valid explanations, including networks of multinational companies, preventing particular AS from accepting routes, also can lead to BAPLs. Motivated by the large number of PANLs that contribute to BAPLs, we also study the number and the ratio of PANLs per day in the 1492 days. The distribution of the private AS numbers in all of the PANLs is concentrated, and most of them are located in the source of the AS paths. The majority of BAPLs resulted from PANLs endure less than one day, and the number of BAPLs which are caused by two or more leaked private ASes are much larger than that of BAPLs which are caused by one leaked private AS. We explain for this phenomenon and give some advices for the operators of ASes.展开更多
A contour-parallel offset （CPO） tool-path linking algorithm is derived without toolretractions and with the largest practicability. The concept of ＂tool-path loop tree＂ （TPL-tree） providing the information on th...A contour-parallel offset （CPO） tool-path linking algorithm is derived without toolretractions and with the largest practicability. The concept of ＂tool-path loop tree＂ （TPL-tree） providing the information on the parent/child relationships among the tool-path loops （TPLs） is presented. The direction, tool-path loop, leaf/branch, layer number, and the corresponding points of the TPL-tree are introduced. By defining TPL as a vector, and by traveling throughout the tree, a CPO tool-path without tool-retractions can be derived.展开更多
This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structur...This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply V<sub>DD</sub> = 1.8 V, the resulting set of performance parameters include power consumption P<sub><sub></sub>DC</sub> = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving P<sub>DC</sub> and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool.展开更多
风火打捆直流外送系统中风电场和电网换相换流器高压直流输电(line commutated converter based high voltage direct current,LCC-HVDC)控制系统可能会激发火电机组的轴系扭振。文章首先采用复转矩系数法和特征值分析法识别出LCC-HVDC...风火打捆直流外送系统中风电场和电网换相换流器高压直流输电(line commutated converter based high voltage direct current,LCC-HVDC)控制系统可能会激发火电机组的轴系扭振。文章首先采用复转矩系数法和特征值分析法识别出LCC-HVDC定电流、风机直流电压外环控制是影响轴系-控制交互模式的关键控制环节。然后,通过推导系统传递函数,提取出反映LCC-HVDC定电流和风机直流电压外环控制对轴系-控制交互模式影响的多条关键控制路径,包括HVDC定电流控制路径、风机直流电压外环控制路径和两者间交互控制路径。进一步,定量计算每条作用路径在轴系-控制交互模式处的阻尼系数,并通过相位补偿在关键控制路径上分别设计附加阻尼控制来提高对应阻尼系数,从而抑制火电机组轴系扭振。最后,基于PSCAD/EMTDC的详细电磁暂态仿真,验证了理论分析的正确性及振荡抑制策略的有效性。展开更多
Based on their "Theorem 2", an O(δ)-time algorithm of searching for the shortest path between each pair of nodes in a double loop network was proposed by K.Mukhopadyaya, et al.(1995). While, unfortunately, ...Based on their "Theorem 2", an O(δ)-time algorithm of searching for the shortest path between each pair of nodes in a double loop network was proposed by K.Mukhopadyaya, et al.(1995). While, unfortunately, it will be proved that both "Theorem 2" and its proof are in error. A new and more faster O(△)-time, △≤δ, algorithm will be presented in this paper.展开更多
This paper is concerned with the robust control synthesis of autonomous underwater vehicle （AUV） for general path following maneuvers. First, we present maneuvering kinematics and vehicle dynamics in a unified frame...This paper is concerned with the robust control synthesis of autonomous underwater vehicle （AUV） for general path following maneuvers. First, we present maneuvering kinematics and vehicle dynamics in a unified framework. Based on H∞ loop-shaping procedure, the 2-DOF autopilot controller has been presented to enhance stability and path tracking. By use of model reduction, the high-order control system is reduced to one with reasonable order, and further the scaled low-order controller has been analyzed in both the frequency and the time domains. Finally, it is shown that the autopilot control system provides robust performance and stability against prescribed levels of uncertainty.展开更多
文摘This paper proposes an area-saving dual-path loop filter（LPF）for low-voltage integrated phase-locked loops（PLLs）.With this LPF,output current of the lowpass-path charge-pump（CP）is B times（B〉1）as great as that of the integration-path CP.By adding voltages across these two paths,the zero-capacitance is magnified B times equivalently.As a result,the chip size is greatly reduced.Based on this LPF,a 1.2 V 3.5 GHz-band PLL is fabricated in SMIC 0.18μm RFCMOS technology.Its zero-capacitance is only 1/30 of that in conventional second-order LPFs. Measured data show that,at a frequency of 3.20 GHz,phase noise is–120.2 dBc/Hz at 1 MHz offset,reference spur is–72 dBc,and power is 24 mW.
基金supported by the National Natural Science Foundation of China(Nos.61772307 and 61161140454)the National Key Basic Research and Development(973) Program of China(Nos.2013CB329105 and 2009CB320500)
文摘As a path vector protocol, Border Gateway Protocol （BGP） messages contain an entire Autonomous System （AS） path to each destination for breaking arbitrary long AS path loops. However, after observing the global routing data from RouteViews, we find that BGP AS Path Looping （BAPL） behavior does occur and in fact can lead to multi-AS forwarding loops in both IPv4 and IPv6. The number and ratio of BAPLs in IPv4 and IPv6 on a daily basis from August 1,2011 to August 31, 2015 are analyzed. Moreover, the distribution of BAPLs among duration and loop length in IPv4 and IPv6 are also studied. Several possible explanations for BAPL are discussed in this paper. Private AS Number Leaking （PANL） has contributed to 0.20% of BAPLs in IPv4, and at least 1.76% of BAPLs in IPv4 were attributed to faulty configurations and malicious attacks. Valid explanations, including networks of multinational companies, preventing particular AS from accepting routes, also can lead to BAPLs. Motivated by the large number of PANLs that contribute to BAPLs, we also study the number and the ratio of PANLs per day in the 1492 days. The distribution of the private AS numbers in all of the PANLs is concentrated, and most of them are located in the source of the AS paths. The majority of BAPLs resulted from PANLs endure less than one day, and the number of BAPLs which are caused by two or more leaked private ASes are much larger than that of BAPLs which are caused by one leaked private AS. We explain for this phenomenon and give some advices for the operators of ASes.
文摘A contour-parallel offset （CPO） tool-path linking algorithm is derived without toolretractions and with the largest practicability. The concept of ＂tool-path loop tree＂ （TPL-tree） providing the information on the parent/child relationships among the tool-path loops （TPLs） is presented. The direction, tool-path loop, leaf/branch, layer number, and the corresponding points of the TPL-tree are introduced. By defining TPL as a vector, and by traveling throughout the tree, a CPO tool-path without tool-retractions can be derived.
文摘This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply V<sub>DD</sub> = 1.8 V, the resulting set of performance parameters include power consumption P<sub><sub></sub>DC</sub> = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving P<sub>DC</sub> and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool.
文摘风火打捆直流外送系统中风电场和电网换相换流器高压直流输电(line commutated converter based high voltage direct current,LCC-HVDC)控制系统可能会激发火电机组的轴系扭振。文章首先采用复转矩系数法和特征值分析法识别出LCC-HVDC定电流、风机直流电压外环控制是影响轴系-控制交互模式的关键控制环节。然后,通过推导系统传递函数,提取出反映LCC-HVDC定电流和风机直流电压外环控制对轴系-控制交互模式影响的多条关键控制路径,包括HVDC定电流控制路径、风机直流电压外环控制路径和两者间交互控制路径。进一步,定量计算每条作用路径在轴系-控制交互模式处的阻尼系数,并通过相位补偿在关键控制路径上分别设计附加阻尼控制来提高对应阻尼系数,从而抑制火电机组轴系扭振。最后,基于PSCAD/EMTDC的详细电磁暂态仿真,验证了理论分析的正确性及振荡抑制策略的有效性。
基金Supported by the National Natural Science Foundation of China(No.69772035)
文摘Based on their "Theorem 2", an O(δ)-time algorithm of searching for the shortest path between each pair of nodes in a double loop network was proposed by K.Mukhopadyaya, et al.(1995). While, unfortunately, it will be proved that both "Theorem 2" and its proof are in error. A new and more faster O(△)-time, △≤δ, algorithm will be presented in this paper.
基金a part of the project titled "Development of Key Marine Equipments for Enhancement of Ocean Industry-Development of Underwater Manipulator and Thrusting System Driven by Electric Motor" funded by the Ministry of Land, Transport and Maritime Affairs, Korea
文摘This paper is concerned with the robust control synthesis of autonomous underwater vehicle （AUV） for general path following maneuvers. First, we present maneuvering kinematics and vehicle dynamics in a unified framework. Based on H∞ loop-shaping procedure, the 2-DOF autopilot controller has been presented to enhance stability and path tracking. By use of model reduction, the high-order control system is reduced to one with reasonable order, and further the scaled low-order controller has been analyzed in both the frequency and the time domains. Finally, it is shown that the autopilot control system provides robust performance and stability against prescribed levels of uncertainty.
