在行波故障测距中,传统的数据采集系统无法满足采集高速变化的暂态电压、电流行波的要求,难以实现故障的精确定位。笔者研制了一种基于PCI总线的高速数据采集系统,介绍了系统原理和硬件电路。以现场可编程门阵列(Field Programmable Gat...在行波故障测距中,传统的数据采集系统无法满足采集高速变化的暂态电压、电流行波的要求,难以实现故障的精确定位。笔者研制了一种基于PCI总线的高速数据采集系统,介绍了系统原理和硬件电路。以现场可编程门阵列(Field Programmable Gate Array,FPGA)作为中央处理器,通过高速A／D转换、同步动态随机存储器(Synchronous Dynamic Random Access Memory,SDRAM)和先进先出(First In First Out,FIFO)高速缓冲存储及PCI总线传输实现高速数据采集。该系统可实现高达100MHz的采样频率,能有效解决输电线路暂态行波的采集问题,在故障定位及微机保护中均能得到广泛应用。展开更多
Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network anal...Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed.展开更多
文摘在行波故障测距中,传统的数据采集系统无法满足采集高速变化的暂态电压、电流行波的要求,难以实现故障的精确定位。笔者研制了一种基于PCI总线的高速数据采集系统,介绍了系统原理和硬件电路。以现场可编程门阵列(Field Programmable Gate Array,FPGA)作为中央处理器,通过高速A／D转换、同步动态随机存储器(Synchronous Dynamic Random Access Memory,SDRAM)和先进先出(First In First Out,FIFO)高速缓冲存储及PCI总线传输实现高速数据采集。该系统可实现高达100MHz的采样频率,能有效解决输电线路暂态行波的采集问题,在故障定位及微机保护中均能得到广泛应用。
文摘Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed.
