The design of a three-input logic circuit using carbon nanotube field effect transistors(CNTFETs)is presented.Ternary logic must be an exact replacement for dual logic since it performs straightforwardly in digital de...The design of a three-input logic circuit using carbon nanotube field effect transistors(CNTFETs)is presented.Ternary logic must be an exact replacement for dual logic since it performs straightforwardly in digital devices,which is why this design is so popular,and it also reduces chip area,both of which are examples of circuit overheads.The proposed module we have investigated is a triple-logic-based one,based on advanced technology CNTFETs and an emphasis on minimizing delay times at various values,as well as comparisons of the design working with various load capacitances.Comparing the proposed design with the existing design,the delay times was reduced from 66.32 to 16.41 ps,i.e.,a 75.26%reduction.However,the power dissipation was not optimized,and increased by 1.44%compared to the existing adder.The number of transistors was also reduced,and the product of power and delay(P∗D)achieved a value of 0.0498053 fJ.An improvement at 1 V was also achieved.A load capacitance(fF)was measured at different values,and the average delay measured for different values of capacitance had a maximum of 83.60 ps and a minimum of 22.54 ps,with a range of 61.06 ps.The power dissipations ranged from a minimum of 3.38μW to a maximum of 6.49μW.Based on these results,the use of this CNTFET half-adder design in multiple Boolean circuits will be a useful addition to circuit design.展开更多
提出了一种基于小波分析和神经网络的电路故障诊断方法。首先用PSPICE(Simulation Program with Integrated Circuit Emphasis,即集成电路编程仿真技术)电路仿真软件对电路进行仿真;然后对电路的输出节点电压信号进行小波分解,提取各频...提出了一种基于小波分析和神经网络的电路故障诊断方法。首先用PSPICE(Simulation Program with Integrated Circuit Emphasis,即集成电路编程仿真技术)电路仿真软件对电路进行仿真;然后对电路的输出节点电压信号进行小波分解,提取各频段的能量作为故障样本;最后利用神经网络的并行处理结构和非线性映射能力,实现故障诊断。仿真实验结果表明该方法对容差模拟电路故障定位具有较高的准确率,为模拟电路故障诊断技术开辟了一条道路,为模拟电路故障诊断技术开辟了一条道路。展开更多
As the fourth passive circuit component, a memristor is a nonlinear resistor that can ＂remember＂ the amount of charge passing through it. The characteristic of ＂remembering＂ the charge and non-volatility makes mem...As the fourth passive circuit component, a memristor is a nonlinear resistor that can ＂remember＂ the amount of charge passing through it. The characteristic of ＂remembering＂ the charge and non-volatility makes memristors great potential candidates in many fields. Nowadays, only a few groups have the ability to fabricate memristors, and most researchers study them by theoretic analysis and simulation. In this paper, we first analyse the theoretical base and characteristics of memristors, then use a simulation program with integrated circuit emphasis as our tool to simulate the theoretical model of memristors and change the parameters in the model to see the influence of each parameter on the characteristics. Our work supplies researchers engaged in memristor-based circuits with advice on how to choose the proper parameters.展开更多
为了满足功率电路及系统设计对p-GaN HEMT(High Electron Mobility Transistor)器件模型的需求,本文建立了一套基于表面势计算方法的增强型p-GaN HEMT器件SPICE(Simulation Program with Integrated Circuit Emphasis)模型.根据耗尽型Ga...为了满足功率电路及系统设计对p-GaN HEMT(High Electron Mobility Transistor)器件模型的需求,本文建立了一套基于表面势计算方法的增强型p-GaN HEMT器件SPICE(Simulation Program with Integrated Circuit Emphasis)模型.根据耗尽型GaN HEMT器件和增强型p-GaN HEMT器件结构的对比,推导出p-GaN栅结构电压解析公式.考虑到p-GaN栅掺杂效应和物理机理,推导出栅电容和栅电流解析公式.同时,与基于表面势的高电子迁移率晶体管高级SPICE模型内核相结合,建立完整的增强型p-GaN HEMT功率器件的SPICE模型.将所建立的SPICE模型与实测结果进行对比验证.结果表明,所建立的模型准确实现了包括转移特性、输出特性、栅电容以及栅电流在内的p-GaN HEMT器件的电学特性.模型仿真数据与实测数据拟合度误差均小于5%.本文所提出的增强型p-GaN HEMT器件模型在进行电路设计时具有重要的应用价值.展开更多
The recent published experimental data of titanium oxide memristor devices which are tested under the same experi- mental conditions exhibit the strange instability and complexity of these devices. Such undesired char...The recent published experimental data of titanium oxide memristor devices which are tested under the same experi- mental conditions exhibit the strange instability and complexity of these devices. Such undesired characteristics preclude the understanding of the device conductive processes and the memristor-based practical applications. The possibility of the coexistence of dopant drift and tunnel barrier conduction in a memristor provides preliminary explanations for the undesired characteristics. However, current research lacks detailed discussion about the coexistence case. In this paper, dopant drift and tunnel barrier-based theories are first analyzed for studying the relations between parameters and physical variables which affect characteristics of mernristors, and then the influences of each parameter change on the conductive behaviors in the single and coexistence cases of the two mechanisms are simulated and discussed respectively. The simulation results provide further explanations of the complex device conduction. Theoretical methods of eliminating or reducing the coex- istence of the two mechanisms are proposed, in order to increase the stability of the device conduction. This work also provides the support for optimizing the fabrications of memristor devices with excellent performance.展开更多
文摘The design of a three-input logic circuit using carbon nanotube field effect transistors(CNTFETs)is presented.Ternary logic must be an exact replacement for dual logic since it performs straightforwardly in digital devices,which is why this design is so popular,and it also reduces chip area,both of which are examples of circuit overheads.The proposed module we have investigated is a triple-logic-based one,based on advanced technology CNTFETs and an emphasis on minimizing delay times at various values,as well as comparisons of the design working with various load capacitances.Comparing the proposed design with the existing design,the delay times was reduced from 66.32 to 16.41 ps,i.e.,a 75.26%reduction.However,the power dissipation was not optimized,and increased by 1.44%compared to the existing adder.The number of transistors was also reduced,and the product of power and delay(P∗D)achieved a value of 0.0498053 fJ.An improvement at 1 V was also achieved.A load capacitance(fF)was measured at different values,and the average delay measured for different values of capacitance had a maximum of 83.60 ps and a minimum of 22.54 ps,with a range of 61.06 ps.The power dissipations ranged from a minimum of 3.38μW to a maximum of 6.49μW.Based on these results,the use of this CNTFET half-adder design in multiple Boolean circuits will be a useful addition to circuit design.
基金The National Natural Science Foundation of China(No.61604038)China Postdoctoral Science Foundation(No.2015M580376)+1 种基金the Natural Science Foundation of Jiangsu Province(No.BK20160691)Jiangsu Postdoctoral Science Foundation(No.1501010A)
文摘提出了一种基于小波分析和神经网络的电路故障诊断方法。首先用PSPICE(Simulation Program with Integrated Circuit Emphasis,即集成电路编程仿真技术)电路仿真软件对电路进行仿真;然后对电路的输出节点电压信号进行小波分解,提取各频段的能量作为故障样本;最后利用神经网络的并行处理结构和非线性映射能力,实现故障诊断。仿真实验结果表明该方法对容差模拟电路故障定位具有较高的准确率,为模拟电路故障诊断技术开辟了一条道路,为模拟电路故障诊断技术开辟了一条道路。
基金supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61003082) the Science Fund for Creative Research Groups of the National Natural Science Foundation of China (Grant No. 60921062)
文摘As the fourth passive circuit component, a memristor is a nonlinear resistor that can ＂remember＂ the amount of charge passing through it. The characteristic of ＂remembering＂ the charge and non-volatility makes memristors great potential candidates in many fields. Nowadays, only a few groups have the ability to fabricate memristors, and most researchers study them by theoretic analysis and simulation. In this paper, we first analyse the theoretical base and characteristics of memristors, then use a simulation program with integrated circuit emphasis as our tool to simulate the theoretical model of memristors and change the parameters in the model to see the influence of each parameter on the characteristics. Our work supplies researchers engaged in memristor-based circuits with advice on how to choose the proper parameters.
基金supported by the National Natural Science Foundation of China(Grant No.61171017)
文摘The recent published experimental data of titanium oxide memristor devices which are tested under the same experi- mental conditions exhibit the strange instability and complexity of these devices. Such undesired characteristics preclude the understanding of the device conductive processes and the memristor-based practical applications. The possibility of the coexistence of dopant drift and tunnel barrier conduction in a memristor provides preliminary explanations for the undesired characteristics. However, current research lacks detailed discussion about the coexistence case. In this paper, dopant drift and tunnel barrier-based theories are first analyzed for studying the relations between parameters and physical variables which affect characteristics of mernristors, and then the influences of each parameter change on the conductive behaviors in the single and coexistence cases of the two mechanisms are simulated and discussed respectively. The simulation results provide further explanations of the complex device conduction. Theoretical methods of eliminating or reducing the coex- istence of the two mechanisms are proposed, in order to increase the stability of the device conduction. This work also provides the support for optimizing the fabrications of memristor devices with excellent performance.
