Design and test results of a low-noise readout integrated circuit for high-energy particle detectors

A low-noise readout integrated circuit for high-energy particle detector is presented.The noise of charge sensitive amplifier was suppressed by using single-side amplifier and resistors as source degeneration.Continuous-time semi-Gaussian filter is chosen to avoid switch noise.The peaking time of pulse shaper and the gain can be programmed to satisfy multi-application.The readout integrated circuit has been designed and fabricated using a 0.35 μm double-poly triple-metal CMOS technology.Test results show the functions of the readout integrated circuit are correct.The equivalent noise charge with no detector connected is 500–700 e in the typical mode,the gain is tunable within 13–130 mV/fC and the peaking time varies from 0.7 to 1.6 μs,in which the average gain is about 20.5 mV/fC,and the linearity reaches 99.2%.

Design of a Low-Noise Front-End Readout Circuit for CdZnTe Detectors

In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm. The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF, and power consumption is 1.65 mW per channel.

Particle detector readout integrated circuit of 0.18μm technology with 164 e equivalent noise charge

Integrated circuits of deep submicron(DSM) CMOS technology are advantageous in volume density, power consumption and thermal noise for multichannel particle detection systems,but there are challenges in the front-end circuit design.In this paper,we present a 0.18μm CMOS front-end readout circuit for low noise CdZnTe detectors in tens of pF capacitance.Solutions to the noise and gate leak problems in DSM technologies are discussed in detail.A prototype chip was designed,with a charge sensitive preamplifier,a 4th order semi-Gaussian shaper and several output drivers.Test results show that the chip has an equivalent noise charge of 164 e,without connecting it to a detector,with an integral nonlinearity of<0.21%and differential nonlinearity of<3.75%.

A low noise and wide dynamic range preamplifier for HPGe detectors

Purpose HPGe detectors can be used for both dark matter search and neutrinoless double beta decay experiments.However,signal amplitudes of these two experiments are quite different.This paper presents the development of a wide dynamic range CMOS preamplifier for HPGe detectors,which can also be used for low light level photon detection.Methods The structure of a dual-stage dual-gain amplifier was adopted to receive the signals with charges ranging from~0.01 fC to 500 fC.A novel“pre-reset”technique has been proposed to reduce the dead time ratio for large signals.A prototype chip was fabricated and tested.Results A minimum ENC of 43 electrons has been achieved for the high-gain channel at 77 K and the maximum charge of the input signal could be up to 500 fC for the low-gain channel,corresponding to a dynamic range above 90 dB.Conclusions The dual-gain structure of the preamplifier and the“pre-reset”method have been successfully verified,which can be used for HPGe detectors for dark matter and neutrino experiments in the future.

Development of series SQUID array with on-chip filter for TES detector

A cold preamplifier based on superconducting quantum interference devices(SQUIDs)is currently the preferred readout technology for the low-noise transition edge sensor(TES).In this work,we have designed and fabricated a series SQUID array(SSA)amplifier for the TES detector readout circuit.In this SSA amplifier,each SQUID cell is composed of a first-order gradiometer formed using two equally large square washers,and an on-chip low pass filter(LPF)as a radiofrequency(RF)choke has been developed to reduce the Josephson oscillation interference between individual SQUID cells.In addition,a highly symmetric layout has been designed carefully to provide a fully consistent embedded electromagnetic environment and achieve coherent flux operation.The measured results show smooth V-Φcharacteristics and a swing voltage that increases linearly with increasing SQUID cell number N.A white flux noise level as low as 0.28μφ;/Hz;is achieved at 0.1 K,corresponding to a low current noise level of 7 pA/Hz;.We analyze the measured noise contribution at mK-scale temperatures and find that the dominant noise derives from a combination of the SSA intrinsic noise and the equivalent current noise of the room temperature electronics.

Design and performances of a low-noise and radiation-hardened readout ASIC for CdZnTe detectors

In this paper,we present the design and performances of a low-noise and radiation-hardened front-end readout application specific integrated circuit（ASIC） dedicated to CdZnTe detectors for a hard X-ray imager in space applications.The readout channel is comprised of a charge sensitive amplifier,a CR-RC shaping amplifier,an analog output buffer,a fast shaper,and a discriminator.An 8-channel prototype ASIC is designed and fabricated in TSMC 0.35-μm mixed-signal CMOS technology,the die size of the prototype chip is 2.2×2.2 mm^2.The input energy range is from 5 to 350 keV.For this 8-channel prototype ASIC,the measured electrical characteristics are as follows：the overall gain of the readout channel is 210 V/pC,the linearity error is less than 2%,the crosstalk is less than 0.36%,The equivalent noise charge of a typical channel is 52.9 e^- at zero farad plus 8.2 e^- per picofarad,and the power consumption is less than 2.4 mW/channel.Through the measurement together with a CdZnTe detector,the energy resolution is 5.9%at the 59.5-keV line under the irradiation of the radioactive source ^（241）Am.The radiation effect experiments show that the proposed ASIC can resist the total ionization dose（TID） irradiation of higher than200 krad（Si）.

用于SiC中子探测器的幅度脉冲调制电荷灵敏模拟前端电路设计

针对SiC沟槽型中子探测器输出的极其微弱的电流脉冲信号,设计了一款专用四通道读出集成电路。每个通道由高增益高带宽电荷灵敏放大器、高阶整形电路、峰值保持和时间检测电路组成,优化了电荷灵敏放大器(CSA)反馈回路,提高了增益线性度,避免了漏电流流入对基线的影响。电路能够快速响应输入信号,实现对能量和时间信息的提取。电路采用0.18μm CMOS工艺完成设计,实现了版图设计,后仿真结果表明,系统等效输入电荷范围为1.14 fC~22.35 fC,电荷转换增益为71.19 mV/fC,非线性误差在1.6%以内,等效噪声电荷为22 e^(-)。电路具有高增益高线性度的优点,能很好针对SiC沟槽型中子探测器输出电荷信号的特点,对其进行专用读出放大。

自稳零低噪声CTIA读出电路研究

红外探测器在国防航天领域应用广泛,其低噪声读出电路是获得有用清晰红外图像的基础。当探测器工作在高背景微弱信号下时,常出现噪声扰动大,各元信号高低不平,部分信号无法读出的问题。针对国内航天工程应用需求,文章设计了一种低噪声的新型读出电路。该电路在传统CTIA的基础上,设计了自稳零技术和新型相关双采样电路,对噪声抑制表现出优良的作用。可应用于低温中波线列红外HgCdTe航天探测器的信号读出以及其他低温和常温探测器的信号读出,工作温度范围为77~300K。基于0.35μm,5V-CMOS工艺进行了10×1线列读出电路后仿真验证与流片,结果表明,与传统CTIA电路对比,输出噪声下降44.7%,总输出噪声仅为72.1μV。

短波红外星图的噪声抑制算法

为了满足星敏感器在近地空间全天时观测的需求,基于短波红外探测器的星敏感器得到了广泛的应用。然而,短波红外星图中存在着条纹非均匀性噪声和缺陷像素等噪点,这些噪声的存在会降低星图的质量。为了抑制上述噪声的影响,本文针对短波红外星图提出了一种噪声抑制算法。首先,通过两点法对每列像素做初步的非均匀性校正,降低同列像素间的非均匀度。然后,通过改进的列向Top-hat算法去除条纹非均匀性噪声的影响。最后,通过中心点扩散连通域算法提取星点。实验结果表明,在两等星内,本文算法能够很好地去除噪声影响,星点的提取误差能够保持在0.3像素即2"内,并且算法针对单帧图像,便于实现,能够满足实时处理的要求。

红外探测器低频噪声长时间监测系统设计

针对锰钴镍氧化物薄膜型红外探测器的结构特点,提出了一种红外探测器低频噪声长时间监测系统设计方案,并进行了测试验证。监测系统采用低噪声偏置电源激发红外探测器的低频噪声,然后将该低频噪声信号通过设计的高性能前置放大器放大,利用基于PC的硬件平台采集放大后的噪声信号,最后通过编写的算法提取噪声信号的各种参量。实际测试结果表明,该监测系统能在10 k Hz的采样率下连续30 d不间断采集探测器的低频噪声,并实时计算噪声信号的峰峰值、均方值、功率谱密度等参数,频率分辨率可达到0.05 Hz。

微弱光电流信号放大器的设计

针对等离子体物理实验装置托卡马克(EAST)实验中微弱信号的探测需要,结合EAST的恶劣电磁环境以及光电检测电路的基本工作原理,设计了一种实用的光电弱信号电流放大器。电路由前置电流放大器、有源滤波放大电路构成,结合电磁兼容技术对信号进行接地和屏蔽,以及合理布线,旨在保证增益和带宽的同时降低噪声。实验表明,基于本设计的光电电流放大电路可有效测量微弱信号,在强电磁场高噪声源中仍然有较好的信噪比和良好的稳定性。

量子光学实验中宽带低噪声光电探测器的研制

针对量子光学实验的特殊要求,通过设计优化宽带低噪声放大电路,研制出宽带低噪声光电探测器。我们重点分析了影响光电探测器增益、带宽和噪声的因素,通过选择合适的光电二极管、取样电阻、反馈电阻和输出电容,获得了宽带低噪声光电探测器。该光电探测器的带宽为2~50 MHz,能够用于输入功率达15 mW光场的噪声测量,适用于包括平衡零拍探测、差拍探测等量子光学实验。考虑到在量子光学实验中需要一对平衡的光电探测器,我们制作了一对2 MHz^31 MHz带宽内共模抑制比大于30 dB的平衡光电探测器,并用于1064 nm激光和1550 nm激光的强度噪声测量和散粒噪声基准的校准。

用于高分辨率Si-PIN探测器的低噪声电荷灵敏前置放大器的设计

介绍了一种用于高分辨率Si-PIN探测器的低噪声晶体管反馈电荷灵敏前置放大器的设计。在场效应管制冷到-20℃,成形时间为6μs条件下,前放的零电容电子学噪声(对Si探测器)为150 eV。与平面工艺技术制备的厚度500μm,灵敏面积5 mm2的Si-PIN探测器配用,采用小型温差电制器制冷至-20℃,对5.9 keV X射线的能量分辨率(FWHM)最好可以达到195 eV。

高性能低噪声数字读出电路

红外焦平面的数字读出是信息化发展的必然方向,其关键技术是数字读出电路。介绍了数字读出电路的发展现状和主要架构,重点分析了时间噪声和空间噪声的来源和影响,并给出低噪声设计指导。同时对线性度、动态范围和帧频等主要性能进行了讨论,设计了两款数字读出电路。采用列级ADC数字读出架构设计了640×512数字焦平面探测器读出电路,读出噪声测试结果为150μV,互连中波探测器测试NETD为13 m K。基于数字像元读出架构设计了384×288数字焦平面探测器读出电路,互连长波探测器测试NETD小于4 m K,动态范围超过90 dB,帧频达到1000 Hz。所设计的两款读出电路有效提升了红外焦平面的灵敏度、动态范围和帧频等性能,表明数字读出电路技术对红外探测器性能的提升具有重要作用。

超低照度下微光图像的深度卷积自编码网络复原

微光/红外图像彩色融合是目前国内外夜视技术的重要发展方向,在超低照度下(环境照度小于2×10-3 lux),由于成像器件限制,微光图像具有低信噪比、低对比度等特点,导致目标难以辨识,成为制约彩色夜视技术的关键。为了提高目标的探测和识别率,提出了一种基于卷积自编码网络的微光图像复原方法,利用卷积自编码网络从微光图像训练集中学习超低照度下微光图像特征,实现去噪和对比度增强。实验结果表明,本文提出的方法得到的峰值信噪比(Peak Signal to Noise Ratio,PSNR)较经典的BM3D算法平均提高1.67dB,结构相似度(Structural Similarity Index,SSIM)的值平均提高0.063,均方根对比度的值(Root Mean Square Contrast,RMSC)平均提高0.19。对微光图像复原具有很好的效果,能够有效地提高信噪比和对比度水平。

一种长波红外光导探测器CMOS电路设计

CMOS电路是高输入阻抗,而长波红外光导探测器是低阻抗,实现低阻抗红外光导探测器与CMOS电路的良好匹配,是目前长波红外探测器高性能成像的关键技术。文中设计了一种能在低温下工作的低阻抗红外光导探测器CMOS电路,差分放大器采用正负电源供电,在输入级采用桥式输入方式,该电路第一级采用1 MΩ的负反馈电阻实现信号放大,第二级放大采用正端放大方式,输入级、第一级放大、第二级放大均采用直接耦合方式。测试结果表明,该放大器与长波红外低输入阻抗光导探测器连接后能正常工作,总放大倍数大于1万倍,3 dB带宽大于4 kHz,等效输入电压噪声小于1.5μV,有效地解决了低阻抗光导探测器与高阻CMOS电路的匹配问题。

一种双频激光干涉信号探测器的设计

为了获取高精密双频激光干涉测量中的干涉信号,完成了一种新的光电探测器电路设计。该探测器利用AD645设计了精密低噪声光电转换前置放大器,保证微弱干涉光信号的有效接收;增益可调的主放大器设计保证输出信号足够的动态范围,适应不同类型的干涉信号处理电路,双二次型带通滤波器有效抑制了噪声与温漂。结果表明,研制的光电探测器能完成微弱干涉信号的接收处理,信噪比高、频率稳定、结构简单易实现,可应用于高精密比相计等激光干涉仪信号处理装置。

前置放大器与高阻抗有机光导探测器的匹配研究

红外有机半导体探测器是一个新兴红外研究领域,并有着广阔的、诱人的应用前景。而与之匹配的前置放大器,不但是展现材料和器件光电特性的核心部件,而且其性能将最终制约探测器的应用范围。研究了红外有机半导体光导探测器与前置放大器的偏置方式、耦合方法和噪声特性等关键技术,并结合实验测试结果,系统讨论了有机高阻光导探测器与前置放大器匹配设计的一般规律。

低功耗多处理器贫点阵图像采集系统

本文设计了一种多处理器多通道的贫点阵图像采集系统。贫点阵探测器的输出信号经过电流／电压转换、模拟多路开关选择、滤波、跟随后,由三片双频高速单片机以协同工作的方式进行采集。该系统具有低功耗、小型化的特点。

640×512 InGaAs探测器低噪声采集系统设计

针对640×512 InGaAs探测器工作原理和输出信号特点,从低噪声角度出发,设计了由探测器驱动电路、信号缓冲电路、单端转差分电路、差分放大电路、模数转换电路、FPGA时序控制电路构成的InGaAs探测器低噪声采集系统。着重解决了在满足驱动的条件下降低系统噪声,对提供精密偏置电压、温控电路和输出信号处理过程给出了详细的设计思想和实现方法。试验结果表明,系统工作正常并获得了良好的噪声特性,整个采集系统暗电平等效均方根(RMS)噪声低于0.3 mV。