The polysilicon p-i-n diode displays noticeable process compatibility and portability in advanced tech- nologies as an electrostatic-discharge （ESD） protection device. This paper presents the reverse breakdown, curr...The polysilicon p-i-n diode displays noticeable process compatibility and portability in advanced tech- nologies as an electrostatic-discharge （ESD） protection device. This paper presents the reverse breakdown, current leakage and capacitance characteristics of fabricated polysilicon p-i-n diodes. To evaluate the ESD robustness, the forward and reverse TLP I-V characteristics were measured. The polysilicon p-i-n diode string was also investigated to further reduce capacitance and fulfill the requirements of tunable cut-in or reverse breakdown voltage. Finally, to explain the effects of the device parameters, we analyze and discuss the inherent properties ofpolysilicon p-i-n diodes.展开更多
The planar edge termination techniques of junction termination extension （JTE） and offset field plates and fieldlimiting rings for the 4H-SiC P i-N diode were investigated and optimized by using a two-dimensional de...The planar edge termination techniques of junction termination extension （JTE） and offset field plates and fieldlimiting rings for the 4H-SiC P i-N diode were investigated and optimized by using a two-dimensional device simulator ISE-TCAD10.0. By experimental verification, a good consistency between simulation and experiment can be observed. The results show that the reverse breakdown voltage for the 4H-SiC P-i-N diode with optimized JTE edge termination can accomplish near ideal breakdown voltage and much lower leakage current. The breakdown voltage can be near 1650 V, which achieves more than 90 percent of ideal parallel plane junction breakdown voltage and the leakage current density can be near 3 ×10^-5 A/cm2.展开更多
A novel 4 H-Si C merged P–I–N Schottky(MPS)with floating back-to-back diode(FBD),named FBD-MPS,is proposed and investigated by the Sentaurus technology computer-aided design(TCAD)and analytical model.The FBD feature...A novel 4 H-Si C merged P–I–N Schottky(MPS)with floating back-to-back diode(FBD),named FBD-MPS,is proposed and investigated by the Sentaurus technology computer-aided design(TCAD)and analytical model.The FBD features a trench oxide and floating P-shield,which is inserted between the P+/N-(PN)junction and Schottky junction to eliminate the shorted anode effect.The FBD is formed by the N-drift/P-shield/N-drift and it separates the PN and Schottky active region independently.The FBD reduces not only the Vturn to suppress the snapback effect but also the Von at bipolar operation.The results show that the snapback can be completely eliminated,and the maximum electric field(Emax)is shifted from the Schottky junction to the FBD in the breakdown state.展开更多
A polarization-diversity loop with a silicon waveguide with a lateral p-i-n diode as a nonlinear medium is used to realize polarization insensitive four-wave mixing. Wavelength conversion of seven dual-polarization 16...A polarization-diversity loop with a silicon waveguide with a lateral p-i-n diode as a nonlinear medium is used to realize polarization insensitive four-wave mixing. Wavelength conversion of seven dual-polarization 16-quadrature amplitude modulation(QAM) signals at 16 GBd is demonstrated with an optical signal-to-noise ratio penalty below 0.7 dB. High-quality converted signals are generated thanks to the low polarization dependence(≤0.5 dB) and the high conversion efficiency(CE) achievable. The strong Kerr nonlinearity in silicon and the decrease of detrimental free-carrier absorption due to the reverse-biased p-i-n diode are key in ensuring high CE levels.展开更多
The tunneling field-effect transistor（TFET） is a potential candidate for the post-CMOS era.In this paper,a threshold voltage model is developed for this new kind of device.First,two-dimensional（2D） models are used...The tunneling field-effect transistor（TFET） is a potential candidate for the post-CMOS era.In this paper,a threshold voltage model is developed for this new kind of device.First,two-dimensional（2D） models are used to describe the distributions of potential and electric field in the channel and two depletion regions.Then based on the physical definition of threshold voltage for the nanoscale TFET,the threshold voltage model is developed.The accuracy of the proposed model is verified by comparing the calculated results with the 2D device simulation data.It has been demonstrated that the effects of varying the device parameters can easily be investigated using the model presented in this paper.This threshold voltage model provides a valuable reference to TFET device design,simulation,and fabrication.展开更多
文摘The polysilicon p-i-n diode displays noticeable process compatibility and portability in advanced tech- nologies as an electrostatic-discharge （ESD） protection device. This paper presents the reverse breakdown, current leakage and capacitance characteristics of fabricated polysilicon p-i-n diodes. To evaluate the ESD robustness, the forward and reverse TLP I-V characteristics were measured. The polysilicon p-i-n diode string was also investigated to further reduce capacitance and fulfill the requirements of tunable cut-in or reverse breakdown voltage. Finally, to explain the effects of the device parameters, we analyze and discuss the inherent properties ofpolysilicon p-i-n diodes.
基金Project supported by the Science and Technology Foundation of Hunan Province of China (Grant No. 2008FJ3102)
文摘The planar edge termination techniques of junction termination extension （JTE） and offset field plates and fieldlimiting rings for the 4H-SiC P i-N diode were investigated and optimized by using a two-dimensional device simulator ISE-TCAD10.0. By experimental verification, a good consistency between simulation and experiment can be observed. The results show that the reverse breakdown voltage for the 4H-SiC P-i-N diode with optimized JTE edge termination can accomplish near ideal breakdown voltage and much lower leakage current. The breakdown voltage can be near 1650 V, which achieves more than 90 percent of ideal parallel plane junction breakdown voltage and the leakage current density can be near 3 ×10^-5 A/cm2.
文摘A novel 4 H-Si C merged P–I–N Schottky(MPS)with floating back-to-back diode(FBD),named FBD-MPS,is proposed and investigated by the Sentaurus technology computer-aided design(TCAD)and analytical model.The FBD features a trench oxide and floating P-shield,which is inserted between the P+/N-(PN)junction and Schottky junction to eliminate the shorted anode effect.The FBD is formed by the N-drift/P-shield/N-drift and it separates the PN and Schottky active region independently.The FBD reduces not only the Vturn to suppress the snapback effect but also the Von at bipolar operation.The results show that the snapback can be completely eliminated,and the maximum electric field(Emax)is shifted from the Schottky junction to the FBD in the breakdown state.
文摘A polarization-diversity loop with a silicon waveguide with a lateral p-i-n diode as a nonlinear medium is used to realize polarization insensitive four-wave mixing. Wavelength conversion of seven dual-polarization 16-quadrature amplitude modulation(QAM) signals at 16 GBd is demonstrated with an optical signal-to-noise ratio penalty below 0.7 dB. High-quality converted signals are generated thanks to the low polarization dependence(≤0.5 dB) and the high conversion efficiency(CE) achievable. The strong Kerr nonlinearity in silicon and the decrease of detrimental free-carrier absorption due to the reverse-biased p-i-n diode are key in ensuring high CE levels.
基金Project supported by the National Ministries and Commissions,China (Grant Nos. 51308040203 and 6139801)the Fundamental Research Funds for the Central Universities,China (Grant Nos. 72105499 and 72104089)the Natural Science Basic Research Plan in Shaanxi Province,China (Grant No. 2010JQ8008)
文摘The tunneling field-effect transistor（TFET） is a potential candidate for the post-CMOS era.In this paper,a threshold voltage model is developed for this new kind of device.First,two-dimensional（2D） models are used to describe the distributions of potential and electric field in the channel and two depletion regions.Then based on the physical definition of threshold voltage for the nanoscale TFET,the threshold voltage model is developed.The accuracy of the proposed model is verified by comparing the calculated results with the 2D device simulation data.It has been demonstrated that the effects of varying the device parameters can easily be investigated using the model presented in this paper.This threshold voltage model provides a valuable reference to TFET device design,simulation,and fabrication.
