GaAs HBT Microwave Power Transistor with On-Chip Stabilization Network

An lnGaP/GaAs HBT microwave power transistor with on-chip parallel RC stabilization network is developed with a standard GaAs MMIC process. From the stability factor K, the device shows unconditional stability in a wide frequency range due to the RC network. The power characteristics of the device as measured by a loadpull system show that the large-signal performance of the power transistor is affected slightly by the RC network. Psat is 30dBm at 5.4GHz,and PldB is larger than 21.6dBm at llGHz. The stability of the device due to RC network is proved by a power combination circuit. This makes the power transistor very suitable for applications in microwavc high power ttBT amplifiers.

Complementary Pass-Transistor Adiabatic Logic Circuit Using Three-Phase Power Supply

A new low power quasi adiabatic logic,complementary pass transistor adiabatic logic (CPAL),is presented.The CPAL circuit is driven by a new three phase power clock,and its non adiabatic loss on output loads can be effectively reduced by using complementary pass transistor logic and transmission gates.Furthermore,the minimization of the energy consumption can be obtained by choosing the optimal size of bootstrapped nMOS transistors,thus it has more efficient energy transfer and recovery.A three phase power supply generator with a small control logic circuit and a single inductor is proposed.An 8 bit adder based on CPAL is designed and verified.With MOSIS 0 25μm CMOS technology,the CPAL adder consumes only 35% of the dissipated energy of a 2N 2N2P adder and is about 50% of the dissipated energy of a PFAL adder for clock rates ranging from 50 to 200MHz.

Progress of power field effect transistor based on ultra-wide bandgap Ga_2O_3 semiconductor material

As a promising ultra-wide bandgap semiconductor, gallium oxide(Ga_2O_3) has attracted increasing attention in recent years. The high theoretical breakdown electrical field(8 MV/cm), ultra-wide bandgap(～ 4.8 eV) and large Baliga's figure of merit(BFOM) of Ga_2O_3 make it a potential candidate material for next generation high-power electronics, including diode and field effect transistor(FET). In this paper, we introduce the basic physical properties of Ga_2O_3 single crystal, and review the recent research process of Ga_2O_3 based field effect transistors. Furthermore, various structures of FETs have been summarized and compared, and the potential of Ga_2O_3 is preliminary revealed. Finally, the prospect of the Ga_2O_3 based FET for power electronics application is analyzed.

Thermal stability improvement of a multiple finger power SiGe heterojunction bipolar transistor under different power dissipations using non-uniform finger spacing

A method of non-uniform finger spacing is proposed to enhance thermal stability of a multiple finger power SiGe heterojunction bipolar transistor under different power dissipations. Temperature distribution on the emitter fingers of a multi-finger SiGe heterojunction bipolar transistor is studied using a numerical electro-thermal model. The results show that the SiGe heterojunction bipolar transistor with non-uniform finger spacing has a small temperature difference between fingers compared with a traditional uniform finger spacing heterojunction bipolar transistor at the same power dissipation. What is most important is that the ability to improve temperature non-uniformity is not weakened as power dissipation increases. So the method of non-uniform finger spacing is very effective in enhancing the thermal stability and the power handing capability of power device. Experimental results verify our conclusions.

Damage effects and mechanism of the silicon NPN monolithic composite transistor induced by high-power microwaves

A two-dimensional model of the silicon NPN monolithic composite transistor is established for the first time by utilizing the semiconductor device simulator, Sentaurus-TCAD. By analyzing the internal distributions of electric field, current density, and temperature of the device, a detailed investigation on the damage process and mechanism induced by high-power microwaves （HPM） is performed. The results indicate that the temperature elevation occurs in the negative half-period and the temperature drop process is in the positive half-period under the HPM injection from the output port. The damage point is located near the edge of the base-emitter junction of T2, while with the input injection it exists between the base and the emitter of T2. Comparing these two kinds of injection, the input injection is more likely to damage the device than the output injection. The dependences of the damage energy threshold and the damage power threshold causing the device failure on the pulse-width are obtained, and the formulas obtained have the same form as the experimental equations, which demonstrates that more power is required to destroy the device if the pulse-width is shorter. Furthermore, the simulation result in this paper has a good coincidence with the experimental result.

Thermal resistance matrix representation of thermal effects and thermal design in multi-finger power heterojunction bipolar transistors

The thermal resistance matrix including self-heating thermal resistance and thermal coupling resistance is presented to describe the thermal effects of multi-finger power heterojunction bipolar transistors. The dependence of thermal resistance matrix on finger spacing is also investigated. It is shown that both self-heating thermal resistance and thermal coupling resistance are lowered by increasing the finger spacing, in which the downward dissipated heat path is widened and the heat flow from adjacent fingers is effectively suppressed. The decrease of self-heating thermal resistance and thermal coupling resistance is helpful for improving the thermal stability of power devices. Furthermore, with the aid of the thermal resistance matrix a 10-finger power heterojunction bipolar transistor （HBT） with non-uniform finger spacing is designed for high thermal stability. The optimized structure can effectively lower the peak temperature while maintaining a uniformity of the temperature profile at various biases and thus the device effectively may operate at a higher power level.

Designing power heterojunction bipolar transistors with non-uniform emitter finger lengths to achieve high thermal stability

With the aid of a thermal-electrical model, a practical method for designing multi-finger power heterojunction bipolar transistors with finger lengths divided in groups is proposed. The method can effectively enhance the thermal stability of the devices without sacrificing the design time. Taking a 40-finger heterojunction bipolar transistor for example, the device with non-uniform emitter finger lengths is optimized and fabricated. Both the theoretical and the experimental results show that, for the optimum device, the peak temperature is lowered by 26.19 K and the maximum temperature difference is reduced by 56.67% when compared with the conventional heterojunction bipolar transistor with uniform emitter finger length. Furthermore, the ability to improve the uniformity of the temperature profile and to expand the thermal stable operation range is strengthened as the power level increases, which is ascribed to the improvement of the thermal resistance in the optimum device. A detailed design procedure is also summarized to provide a general guide for designing power heterojunction bipolar transistors with non-uniform finger lengths.

Design method for transistor-inverted welding power supplies

From the viewpoint of reliability and practicability, a general design method and the related considerationsfor transistor- inverted welding power supplies are proposed in this paper. The detail contents are composed of the choice ofinverters, the choice and protection of transistors, the determination of inverting frequency, the design of transformers,and the choice of output rectifiers and rectifying diodes. Besides, a concrete design example of the transistor-invertedpower supply for plasma arc cutting is introduced.

Review of semiconductor devices and other power electronics components at cryogenic temperature

With the increasing demand for high power density,and to meet extreme working conditions,research has been focused on inves-tigating the performance of power electronics devices at cryogenic temperatures.The aim of this paper is to review the performance of power semiconductor devices,passive components,gate drivers,sensors,and eventually power electronics converters at cryogenic temperatures.By comparing the physical properties of semiconductor materials and the electrical performance of commercial power semiconductor devices,silicon carbide switches show obvious disadvantages due to the increased on-resistance and switching time at cryogenic temperature.In contrast,silicon and gallium nitride devices exhibit improved performance when tem-perature is decreased.The performance ceiling of power semiconductor devices can be influenced by gate drivers,within which the commercial alternatives show deteriorated performance at cryogenic temperature compared to room temperature.Moreover,options for voltage and current sense in cryogenic environments are justified.Based on the cryogenic performance of the various components afore-discussed,this paper ends by presenting an overview of the published converter,which are either partially or fully tested in a cryogenic environment.

MOS 功率器件的新成员——MBSIT

介绍了一种新型ＭＯＳ控制功率器件———ＭＢＳＩＴ，它的制造工艺类似于一个功率ＭＯＳ的制造工艺，其材料是在ｎ＋衬底上生长ｎ－外延层。该器件被设计为常开器件，它的阳极电流通路完全被ＢＳＩＴ沟道中的自建电场所夹断，当外加一个正向栅压时，器件可通过阳极电流。该器件具有低的导通电阻、高速和大的导通电流密度，是一种很有发展前途的大电流、高速度、高效率开关器件。

Analytical Model of Surface Field Distribution and Breakdown Voltage for RESURF LDMOS Transistor

An analytical model of the surface field distribution and breakdown voltage of the reduced surface field lateral double diffusion MOS transistor is proposed.Based on the 2-D Poisson's equation solution,the derived model gives the closed form solutions of the surface potential and electrical field distributions as a function of the structure parameters and drain bias.A criterion for obtaining the optimal trade-off between the breakdown voltage and on-resistance is also presented to serve to quantify the maximum breakdown voltage and optimal relations of all design parameters.Analytical results are shown in good agreement with the numerical analysis obtained by the semiconductor device simulator MEDICI and previous reported experimental data.

A monolithic InGaP/GaAs HBT power amplifier for W-CDMA applications

A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the power supply and temperature, but also compensates deviations caused by the increase in input power. The bias circuit is a current-mirror configuration, and the feedback circuit helps to maintain bias voltage at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. A shunt capacitor at the base node of the active bias transistor enhances the linearity of the PA. The chip is fabricated in an InGaP/GaAs heterojunction bipolar transistor （HBT） process. Measured results exhibit a 26. 6-dBm output compression point, 33.6% power-added efficiency （PAE） and - 40.2 dBc adjacent channel power ratio （ACPR） for wide-band code division multiple access （W-CDMA） applications.

Low Voltage Class C SiGe Microwave Power HBTs

The structure and microwave characteristics of low-voltage SiGe power HBTs are given.With this structure,the device can operate in a low-voltage and high-current state.By using an interdigital emitter strip layout and the operating voltage ranging from 3 to 4V,the output power in Class C operation can reach 1 65W at 1GHz,with the gain of 8dB.The highest collector efficiency is 67 8% under 3V.

ISM Band Medium Power Amplifier

With the large-signal model extracted from the InGaP/GaAs HBT with three fingers,a three-stage,class AB power amplifier at ISM band is designed.Through the optimization of the traditional bias network,the gain compression at the low input power level is eliminated successfully.At 3.5V of supply voltage of the power amplifier after optimization exhibits 30dBm of maximum linear output power,43.4% of power added efficiency 109.7mA of a quite low quiescent bias current ,29.1dB of the corresponding gain,and -100dBc of the adjacent channel power rejection (ACPR) at the output power of 30dBm.

Design of CMOS class-E power amplifier for low power applications

A fully integrated class-E power amplifier（PA） at 2.4 GHz implemented in a 0. 18 μm 6-metal-layer mixed/RF CMOS （ complementary metal-oxide-semiconductor transistor ） technology is presented. A two-stage amplification structure is chosen for this PA. The driving stage produces a high swing switch signal by using resonation technology. The output stage is designed as a class-E topology to realize the power amplification. Under a 1.2 V power supply, the PA delivers a maximum output power of 8. 8 dBm with a power-added efficiency （PAE） of 44%. A new power control method for the class-E power amplifier is described. By changing the amplitude and duty cycle of the signal which enters the class-E switch transistor, the output power can be covered from - 3 to 8. 8 dBm through a three-bit control word. The proposed PA can be used in low power applications, such as wireless sensor networks and biotelemetry systems.

Effects of microwave pulse-width damage on a bipolar transistor

This paper presents a theoretical study of the pulse-width effects on the damage process of a typical bipolar transistor caused by high power microwaves（HPMs） through the injection approach.The dependences of the microwave damage power,P,and the absorbed energy,E,required to cause the device failure on the pulse width τ are obtained in the nanosecond region by utilizing the curve fitting method.A comparison of the microwave pulse damage data and the existing dc pulse damage data for the same transistor is carried out.By means of a two-dimensional simulator,ISE-TCAD,the internal damage processes of the device caused by microwave voltage signals and dc pulse voltage signals are analyzed comparatively.The simulation results suggest that the temperature-rising positions of the device induced by the microwaves in the negative and positive half periods are different,while only one hot spot exists under the injection of dc pulses.The results demonstrate that the microwave damage power threshold and the absorbed energy must exceed the dc pulse power threshold and the absorbed energy,respectively.The dc pulse damage data may be useful as a lower bound for microwave pulse damage data.

Development of 8-inch Key Processes for Insulated-Gate Bipolar Transistor

Based on the construction of the 8-inch fabricat ion line, advanced process technology of 8-inch wafer, as well as the fourth-generation high-voltage double-diffused metal-oxide semiconductor(DMOS+) insulated-gate bipolar transistor(IGBT) technology and the fifth-generation trench gate IGBT technology, have been developed, realizing a great-leap forward technological development for the manufacturing of high-voltage IGBT from 6-inch to 8-inch. The 1600 A/1.7 kV and 1500 A/3.3 kV IGBT modules have been successfully fabricated, qualified, and applied in rail transportation traction system.

The pulsed microwave damage trend of a bipolar transistor as a function of pulse parameters

In the present paper we conduct a theoretical study of the thermal accumulation effect of a typical bipolar transistor caused by high power pulsed microwaves（HPMs）,and investigate the thermal accumulation effect as a function of pulse repetition frequency（PRF） and duty cycle.A study of the damage mechanism of the device is carried out from the variation analysis of the distribution of the electric field and the current density.The result shows that the accumulation temperature increases with PRF increasing and the threshold for the transistor is about 2 kHz.The response of the peak temperature induced by the injected single pulses indicates that the falling time is much longer than the rising time.Adopting the fitting method,the relationship between the peak temperature and the time during the rising edge and that between the peak temperature and the time during the falling edge are obtained.Moreover,the accumulation temperature decreases with duty cycle increasing for a certain mean power.

Impact of switching frequencies on the TID response of SiC power MOSFETs

Different switching frequencies are required when SiC metal-oxide-semiconductor field-effect transistors(MOSFETs)are switching in a space environment.In this study,the total ionizing dose(TID)responses of SiC power MOSFETs are investigated under different switching frequencies from 1 kHz to 10 MHz.A significant shift was observed in the threshold voltage as the frequency increased,which resulted in premature failure of the drain-source breakdown voltage and drain-source leakage current.The degradation is attributed to the high activation and low recovery rates of traps at high frequencies.The results of this study suggest that a targeted TID irradiation test evaluation method can be developed according to the actual switching frequency of SiC power MOSFETs.

Microwave damage susceptibility trend of a bipolar transistor as a function of frequency

We conduct a theoretical study of the damage susceptibility trend of a typical bipolar transistor induced by a high-power microwave （HPM） as a function of frequency. The dependences of the burnout time and the damage power on the signal frequency are obtained. Studies of the internal damage process and the mechanism of the device are carried out from the variation analysis of the distribution of the electric field, current density, and temperature. The investigation shows that the burnout time linearly depends on the signal frequency. The current density and the electric field at the damage position decrease with increasing frequency. Meanwhile, the temperature elevation occurs in the area between the p-n junction and the n n＋ interface due to the increase of the electric field. Adopting the data analysis software, the relationship between the damage power and frequency is obtained. Moreover, the thickness of the substrate has a significant effect on the burnout time.