具有万伏级以上电压隔离和兆瓦级以上直流能量变换能力的大容量直流变压器(high-power dc transformer,HDCT),是实现高/中/低压直流系统互联、构建直流电网的核心基础装备。文中提出基于IGCT-Plus器件和中频隔离的HDCT技术方案,给出IGCT...具有万伏级以上电压隔离和兆瓦级以上直流能量变换能力的大容量直流变压器(high-power dc transformer,HDCT),是实现高/中/低压直流系统互联、构建直流电网的核心基础装备。文中提出基于IGCT-Plus器件和中频隔离的HDCT技术方案,给出IGCT-HDCT拓扑结构,分析换流特性,提出实现软开通和准软关断的换流方法,可大幅降低开关损耗。在此基础上,对功率器件和变压器损耗进行系统分析,针对基于中频隔离的高压大容量直流变压器,提出的IGCT方案相比,Si C和IGBT方案具有更低的损耗。文中给出MW级IGCT-HDCT功率模块的设计方法,研制工程样机,并对子模块的大电流关断和大功率运行状态进行系统性的测试,验证IGCT-HDCT方案的正确性和有效性。展开更多
A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control ...A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.展开更多
文摘具有万伏级以上电压隔离和兆瓦级以上直流能量变换能力的大容量直流变压器(high-power dc transformer,HDCT),是实现高/中/低压直流系统互联、构建直流电网的核心基础装备。文中提出基于IGCT-Plus器件和中频隔离的HDCT技术方案,给出IGCT-HDCT拓扑结构,分析换流特性,提出实现软开通和准软关断的换流方法,可大幅降低开关损耗。在此基础上,对功率器件和变压器损耗进行系统分析,针对基于中频隔离的高压大容量直流变压器,提出的IGCT方案相比,Si C和IGBT方案具有更低的损耗。文中给出MW级IGCT-HDCT功率模块的设计方法,研制工程样机,并对子模块的大电流关断和大功率运行状态进行系统性的测试,验证IGCT-HDCT方案的正确性和有效性。
文摘A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.
