Information theoretical results have shown that Distributed Antenna Systems (DAS) can obtain higher capacity than Co-located Antenna Systems (CAS). In this paper,we investigate a downlink port selection and power allo...Information theoretical results have shown that Distributed Antenna Systems (DAS) can obtain higher capacity than Co-located Antenna Systems (CAS). In this paper,we investigate a downlink port selection and power allocation scheme in Distributed Multiple-Input Multiple-Output (D-MIMO) systems,where Distributed Antenna (DA) ports randomly locate in the cell. The contri-bution of this paper can be summarized as two parts. Firstly,we analyze how antenna correlation af-fects power allocation in D-MIMO systems. Secondly,based on large scale fading and antenna corre-lation,a low-complexity port selection and power allocation scheme is proposed. In the proposed scheme,we take both large scale fading and antenna correlation into consideration. Moreover,User Equipment (UE) only needs to feedback the rank of transmit antenna correlation matrix,which will not increase system complexity too much. Simulation results verify the capacity improvement based on the proposed power allocation scheme.展开更多
With the rapid development of integrated circuits [1], low power consumption has become a constant pursuiting goal of the designer in chip design. As the memory almost takes up the area of the chip, reducing memory po...With the rapid development of integrated circuits [1], low power consumption has become a constant pursuiting goal of the designer in chip design. As the memory almost takes up the area of the chip, reducing memory power consumption will significantly reduce the overall power consumption of the chip;according to ISSCC’s 2014 report about technology trends discussions, there two points of the super-low power SRAM design: 1) design a more effective static and dynamic power control circuit for each key module of SRAM;2) ensure that in the case of the very low VDD min, SRAM can operating reliably and stably. This paper makes full use reliable of 8T cell, and the single-port sense amplifier has solved problems in the traditional 8T cell structure, making the new structure of the memory at a greater depth still maintain good performance and lower power consumption. Compared with the designed SRAM the SRAM generated by commercial compiler, as the performance loss at SS corner does not exceed 10%, the whole power consumption could be reduced by 54.2%, which can achieve a very good effect of low-power design.展开更多
基金Supported by the National High Technology Research and Development Program of China (863 Program,No.2006AA01Z272 and No.2006AA01Z283)Beijing Municipal Science & Technology Commission (No.D08080100620802)
文摘Information theoretical results have shown that Distributed Antenna Systems (DAS) can obtain higher capacity than Co-located Antenna Systems (CAS). In this paper,we investigate a downlink port selection and power allocation scheme in Distributed Multiple-Input Multiple-Output (D-MIMO) systems,where Distributed Antenna (DA) ports randomly locate in the cell. The contri-bution of this paper can be summarized as two parts. Firstly,we analyze how antenna correlation af-fects power allocation in D-MIMO systems. Secondly,based on large scale fading and antenna corre-lation,a low-complexity port selection and power allocation scheme is proposed. In the proposed scheme,we take both large scale fading and antenna correlation into consideration. Moreover,User Equipment (UE) only needs to feedback the rank of transmit antenna correlation matrix,which will not increase system complexity too much. Simulation results verify the capacity improvement based on the proposed power allocation scheme.
文摘With the rapid development of integrated circuits [1], low power consumption has become a constant pursuiting goal of the designer in chip design. As the memory almost takes up the area of the chip, reducing memory power consumption will significantly reduce the overall power consumption of the chip;according to ISSCC’s 2014 report about technology trends discussions, there two points of the super-low power SRAM design: 1) design a more effective static and dynamic power control circuit for each key module of SRAM;2) ensure that in the case of the very low VDD min, SRAM can operating reliably and stably. This paper makes full use reliable of 8T cell, and the single-port sense amplifier has solved problems in the traditional 8T cell structure, making the new structure of the memory at a greater depth still maintain good performance and lower power consumption. Compared with the designed SRAM the SRAM generated by commercial compiler, as the performance loss at SS corner does not exceed 10%, the whole power consumption could be reduced by 54.2%, which can achieve a very good effect of low-power design.
