Variants of Secondary Control with Power Recovery for Loading Hydraulic Driving Device

Current high power load simulators are generally incapable of obtaining both high loading performance and high energy efficiency. Simulators with high energy efficiency are used to simulate static-state load, and those with high dynamic performance typically have low energy efficiency. In this paper, the variants of secondary control（VSC） with power recovery are developed to solve this problem for loading hydraulic driving devices that operate under variable pressure, unlike classical secondary control（CSC） that operates in constant pressure network. Hydrostatic secondary control units are used as the loading components, by which the absorbed mechanical power from the tested device is converted into hydraulic power and then fed back into the tested system through 4 types of feedback passages（FPs）. The loading subsystem can operate in constant pressure network, controlled variable pressure network, or the same variable pressure network as that of the tested device by using different FPs. The 4 types of systems are defined, and their key techniques are analyzed, including work principle, simulating the work state of original tested device, static operation points, loading performance, energy efficiency, and control strategy, etc. The important technical merits of the 4 schemes are compared, and 3 of the schemes are selected, designed, simulated using AMESim and evaluated. The researching results show that the investigated systems can simulate the given loads effectively, realize the work conditions of the tested device, and furthermore attain a high power recovery efficiency that ranges from 0.54 to 0.85, even though the 3 schemes have different loading performances and energy efficiencies. This paper proposes several loading schemes that can achieve both high dynamic performance and high power recovery efficiency.

CPPL: A New Chunk-Based Proportional-Power Layout with Fast Recovery

In recent years,the number and size of data centers and cloud storage systems has increased.These two corresponding trends are dra matically increasing energy consumption and disk failure in emerging facilities.This paper describes a new chunk-based proportion al-power layout called CPPL to address the issues.Our basic idea is to leverage current proportional-power layouts by using declus tering techniques.In this way,we can manage power at a much finer-grained level.CPPL includes a primary disk group and a large number of secondary disks.A primary disk group contains one copy of available datasets and is always active in order to respond to in coming requests.Other copies of data are placed on secondary disks in declusterd way for power-efficiency and parallel recovery at a finer-grained level.Through comprehensive theoretical proofs and experiments,we conclude that CPPL can save more power and achieve a higher recovery speed than current solutions.

Scaling trends in energy recovery logic:an analytical approach

This paper presents an analytical model to study the scaling trends in energy recovery logic.The energy performance of conventional CMOS and energy recovery logic are compared with scaling the design and technology parameters such as supply voltage,device threshold voltage and gate oxide thickness.The proposed analytical model is validated with simulation results at 90 nm and 65 nm CMOS technology nodes and predicts the scaling behavior accurately that help us to design an energy-efficient CMOS digital circuit design at the nanoscale.This research work shows the adiabatic switching as an ultra-low-power circuit technique for sub-100 nm digital CMOS circuit applications.

p^+–n^-–n^+-type power diode with crystalline/nanocrystalline Si mosaic electrodes

Using p~＋-type crystalline Si with n~＋-type nanocrystalline Si（nc-Si） and n~＋-type crystalline Si with p~＋-type nc-Si mosaic structures as electrodes,a type of power diode was prepared with epitaxial technique and plasmaenhanced chemical vapor deposition（PECVD） method.Firstly,the basic p~＋-n^--n~＋-type Si diode was fabricated by epitaxially growing p~＋- and n~＋-type layers on two sides of a lightly doped n^--type Si wafer respectively.Secondly,heavily phosphorus-doped Si film was deposited with PECVD on the lithography mask etched p~＋-type Si side of the basic device to form a component with mosaic anode.Thirdly,heavily boron-doped Si film was deposited on the etched n~＋-type Si side of the second device to form a diode with mosaic anode and mosaic cathode.The images of high resolution transmission electronic microscope and patterns of X-ray diffraction reveal nanocrystallization in the phosphorus- and boron-deposited films.Electrical measurements such as capacitancevoltage relation,current-voltage feature and reverse recovery waveform were carried out to clarify the performance of prepared devices.The important roles of（n^-）Si/（p~＋）nc-Si and（n^-）Si/（n~＋）nc-Si junctions in the static and dynamic conduction processes in operating diodes were investigated.The performance of mosaic devices was compared to that of a basic one.