Next Generation Narrowband(Under 500 kHz) Power Line Communications(PLC) Standards

In the past decade,several efforts around the world were started with the goal of introducing "smart metering" capabilities into the power grid.These efforts have spurred renewed interest in the design of next generation Narrowband Power Line Communications(NB-PLC) transceivers.In the past few years,ITU-T and IEEE have standardized a family of next generation OFDM-based NB-PLC transceivers some of which are today being considered for massive deployments in Europe and Asia.This paper addresses the important role that PLC has not only for smart metering but also for many other Smart Grid applications,and also gives an overview of the main differences between these next generation NB-PLC standards.

Revision of the National Standard on Safety Specification for Power Driven Vehicles Operating on Roads

The national standard--Safety Specifications for Power Driven VehiclesOperating on Roads--is the most basic technical regulation for safety and technical management ofmotor vehicles in China. It is the safety and technical basis for the Public Security TrafficControl Dept. to register new vehicles, periodic inspection of vehicles under operation andinspection of vehicles involved in traffic accidents. It is also one of the important technicalbases of our country for compulsory inspection of new vehicles on fi-nalization of its model,ex-works inspection of new vehicles and the inspection of imported motor vehicles. Since the formalcountrywide implementation of GB7258-1997 Safety Specifications for Power Driven Vehicles Operatingon Roads on Jan. 1, 1998, the standard has played a very active role in strengthening the operatingsafety management of motor vehicles, improving the operating safety level of motor vehicles, and insafeguarding road traffic safety, etc. However, along with the rapid and sustainable growth of ournational economy, the number of motor vehicles has increased rapidly, especially privately-ownedautomobiles, so that the incidence of road traffic accidents rises yearly and the road trafficsafety situation is becoming increasingly serious. Therefore, the General Administration of QualitySupervision, Inspection and Quarantine of the People's Republic of China (AQSIQ) and theStandardization Administration of China (SAC) have issued the revised standard GB725 8-2004 SafetySpecifications for Power Driven Vehicles Operating on Roads, which will be put into effect onOctober 1, 2004. The timely revision of this standard is very necessary for upgrading the safety andtechnical requirements for motor vehicles in China.

Analysis and Recommendations for the Adaptability of China’s Power System Security and Stability Relevant Standards

In developing power grids,setting standards is critical to its success.The development of China’s power industry has proposed new requirements for power systems to ensure secure and stable operations.The principal standards for the security and stability of China’s current power systems are analyzed in terms of operational control,generator-grid coordination and simulation.The shortcomings are pointed out and the directions of future development are discussed.In the end,the study highlighted the following key areas that require further research and improvement:the evaluation criteria of power system security and stability should be improved to ensure the secure and stable operation of China’s power systems;the operational control standards should be constantly enhanced to increase the reliability and flexibility of operational control strategies;generatorgrid coordination standards should be upgraded to improve the coordination between the generator control protection system and the grid;and the simulation methodology should be standardized in future power system security and stability research.

Reliability evaluation of high-performance,low-power FinFET standard cells based on mixed RBB/FBB technique

With shrinking transistor feature size,the fin-type field-effect transistor（FinFET） has become the most promising option in low-power circuit design due to its superior capability to suppress leakage.To support the VLSI digital system flow based on logic synthesis,we have designed an optimized high-performance low-power FinFET standard cell library based on employing the mixed FBB/RBB technique in the existing stacked structure of each cell.This paper presents the reliability evaluation of the optimized cells under process and operating environment variations based on Monte Carlo analysis.The variations are modelled with Gaussian distribution of the device parameters and 10000 sweeps are conducted in the simulation to obtain the statistical properties of the worst-case delay and input-dependent leakage for each cell.For comparison,a set of non-optimal cells that adopt the same topology without employing the mixed biasing technique is also generated.Experimental results show that the optimized cells achieve standard deviation reduction of 39.1%and 30.7%at most in worst-case delay and inputdependent leakage respectively while the normalized deviation shrinking in worst-case delay and input-dependent leakage canbe up to 98.37%and 24.13%,respectively,which demonstrates that our optimized cells are less sensitive to variability and exhibit more reliability.

An AES chip with DPA resistance using hardware-based random order execution

This paper presents an AES（advanced encryption standard） chip that combats differential power analysis （DPA） side-channel attack through hardware-based random order execution.Both decryption and encryption procedures of an AES are implemented on the chip.A fine-grained dataflow architecture is proposed,which dynamically exploits intrinsic byte-level independence in the algorithm.A novel circuit called an HMF（Hold-MatchFetch） unit is proposed for random control,which randomly sets execution orders for concurrent operations.The AES chip was manufactured in SMIC 0.18μm technology.The average energy for encrypting one group of plain texts（128 bits secrete keys） is 19 nJ.The core area is 0.43 mm^2.A sophisticated experimental setup was built to test the DPA resistance.Measurement-based experimental results show that one byte of a secret key cannot be disclosed from our chip under random mode after 64000 power traces were used in the DPA attack.Compared with the corresponding fixed order execution,the hardware based random order execution is improved by at least 21 times the DPA resistance.