This paper uses CT to gain the energy directly from the high-voltage transmission line, to address the problem of power supply for monitoring system in high voltage side of transmission line. The draw-out power coil c...This paper uses CT to gain the energy directly from the high-voltage transmission line, to address the problem of power supply for monitoring system in high voltage side of transmission line. The draw-out power coil can induce voltage from the transmission line, using single-chip microcomputer to analog and output PMW wave to control the charging module, provides a stable 3.4 V DC voltage to the load, and solve the problem of easy saturating of core. The power supply based on this kind of draw-out power coil has undergone the overall testing, and it is verified-showing that it can properly work in a non-saturated status within the current range of 50 - 1000 A, and provide a stable output. The equipment also design protection circuit to improve the reliability to avid the impacts of the impulse current or short-circuit current. It effectively solves the problem of power supply for On-line Monitoring System of Transmission.展开更多
An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management （PM） controller chips applied to telecommunication, automotive, lighting equipment, ...An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management （PM） controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio （PSRR） and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD （Bipolar-CMOS-DMOS） technology. The experimental results show that all main expectations are achieved.展开更多
Based on the idea of risk evaluation, the existing lightning damage risk assessment methods are reviewed and summarized in this paper. And the power grid lightning damage risk assessment system is established on the b...Based on the idea of risk evaluation, the existing lightning damage risk assessment methods are reviewed and summarized in this paper. And the power grid lightning damage risk assessment system is established on the basis of lightning flashover risk evaluation methodology for transmission lines, and adopts the improved Analytic Hierarchy Process as the core algorithm. It can comprehensively evaluate the risk for transmission lines of regional grid, various sections of a line and each tower of the section, considering much more impact factors, including the running time of line, importance of grades, equipment damage, and the success rate of lightning stroke reclosing and so on. According to the calculation results of the risk assessment of the analytic hierarchy process and lightning flashover risk evaluation, the principles and methods of grade classification for power grid lightning damage risk map are studied, and give typical examples in the paper. It can describe the lightning withstanding ability much more scientifically and provide important references for the manage department of power system.展开更多
This paper presents an analog front end for a power line communication system, including a 12-bit 3.2-MS/s energy-efficient successive approximation register analog-to-digital converter, a positive feedback programmab...This paper presents an analog front end for a power line communication system, including a 12-bit 3.2-MS/s energy-efficient successive approximation register analog-to-digital converter, a positive feedback programmable gain amplifier, a 9.8 ppm/℃ bandgap reference and on-chip low-output voltage regulators. A two segment capacitive array structure （6 MSB 5 LSB） composed by split capacitors is designed for the SAR core to save area cost and release reference voltage accuracy requirements. Implemented in the GSMC 0.13 #m 1.5 V/12 V dual-gate 4P6M e-flash process, the analog front end occupies an area of 0.457 mm2 and consumes power of 18.8 mW, in which 1.1 mW cost by the SAR ADC. Measured at 500 kHz input, the spurious-free dynamic range and signal-to-noise plus distortion ratio of the ADC are 71.57 dB and 60.60 dB respectively, achieving a figure of merit of 350 U/conversion-step.展开更多
In this paper, a new principle for an adaptive line driver using Fuzzy logic is presented. This type of line driver can adapt its output impedance and gain, automatically to the applied load using a fuzzy logic contro...In this paper, a new principle for an adaptive line driver using Fuzzy logic is presented. This type of line driver can adapt its output impedance and gain, automatically to the applied load using a fuzzy logic controller (FLC). This results in automatically corrected output impedance for different cables with terminations. Also, the line driver output impedance and gain become insensitive to process and line variations. As an example, a line driver for ADSL application has been designed. The circuit operates from a 3.3 v in a 0.35 um standard CMOS technology. The power consumption of FLC is about 1 mW. The circuit dissipates 106 mW and exhibits a -62 dB THD for a 3.2-Vpp signal at 5 MHz across a 75 ohms Load. It has a relatively high -3 dB bandwidth (240 MHz) with good phase margin of about 67 degrees in a 10 pF load capacitor.展开更多
文摘This paper uses CT to gain the energy directly from the high-voltage transmission line, to address the problem of power supply for monitoring system in high voltage side of transmission line. The draw-out power coil can induce voltage from the transmission line, using single-chip microcomputer to analog and output PMW wave to control the charging module, provides a stable 3.4 V DC voltage to the load, and solve the problem of easy saturating of core. The power supply based on this kind of draw-out power coil has undergone the overall testing, and it is verified-showing that it can properly work in a non-saturated status within the current range of 50 - 1000 A, and provide a stable output. The equipment also design protection circuit to improve the reliability to avid the impacts of the impulse current or short-circuit current. It effectively solves the problem of power supply for On-line Monitoring System of Transmission.
文摘An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management （PM） controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio （PSRR） and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD （Bipolar-CMOS-DMOS） technology. The experimental results show that all main expectations are achieved.
文摘Based on the idea of risk evaluation, the existing lightning damage risk assessment methods are reviewed and summarized in this paper. And the power grid lightning damage risk assessment system is established on the basis of lightning flashover risk evaluation methodology for transmission lines, and adopts the improved Analytic Hierarchy Process as the core algorithm. It can comprehensively evaluate the risk for transmission lines of regional grid, various sections of a line and each tower of the section, considering much more impact factors, including the running time of line, importance of grades, equipment damage, and the success rate of lightning stroke reclosing and so on. According to the calculation results of the risk assessment of the analytic hierarchy process and lightning flashover risk evaluation, the principles and methods of grade classification for power grid lightning damage risk map are studied, and give typical examples in the paper. It can describe the lightning withstanding ability much more scientifically and provide important references for the manage department of power system.
文摘This paper presents an analog front end for a power line communication system, including a 12-bit 3.2-MS/s energy-efficient successive approximation register analog-to-digital converter, a positive feedback programmable gain amplifier, a 9.8 ppm/℃ bandgap reference and on-chip low-output voltage regulators. A two segment capacitive array structure （6 MSB 5 LSB） composed by split capacitors is designed for the SAR core to save area cost and release reference voltage accuracy requirements. Implemented in the GSMC 0.13 #m 1.5 V/12 V dual-gate 4P6M e-flash process, the analog front end occupies an area of 0.457 mm2 and consumes power of 18.8 mW, in which 1.1 mW cost by the SAR ADC. Measured at 500 kHz input, the spurious-free dynamic range and signal-to-noise plus distortion ratio of the ADC are 71.57 dB and 60.60 dB respectively, achieving a figure of merit of 350 U/conversion-step.
文摘In this paper, a new principle for an adaptive line driver using Fuzzy logic is presented. This type of line driver can adapt its output impedance and gain, automatically to the applied load using a fuzzy logic controller (FLC). This results in automatically corrected output impedance for different cables with terminations. Also, the line driver output impedance and gain become insensitive to process and line variations. As an example, a line driver for ADSL application has been designed. The circuit operates from a 3.3 v in a 0.35 um standard CMOS technology. The power consumption of FLC is about 1 mW. The circuit dissipates 106 mW and exhibits a -62 dB THD for a 3.2-Vpp signal at 5 MHz across a 75 ohms Load. It has a relatively high -3 dB bandwidth (240 MHz) with good phase margin of about 67 degrees in a 10 pF load capacitor.
