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Electronically Controllable Fully-Uncoupled Explicit Current-Mode Quadrature Oscillator Using VDTAs and Grounded Capacitors 被引量:2
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作者 Dinesh Prasad Mayank Srivastava Data Ram Bhaskar 《Circuits and Systems》 2013年第2期169-172,共4页
An electronically controllable fully uncoupled explicit current-mode quadrature oscillator employing Voltage Differencing Transconductance Amplifiers (VDTAs) as active elements has been presented. The proposed configu... An electronically controllable fully uncoupled explicit current-mode quadrature oscillator employing Voltage Differencing Transconductance Amplifiers (VDTAs) as active elements has been presented. The proposed configuration employs two VDTAs along with grounded capacitors and offers the following advantageous features 1) fully and electronically independent control of condition of oscillation (CO) and frequency of oscillation (FO);2) explicit current-mode quadrature oscillations;and 3) low active and passive sensitivities. The workability of proposed configuration has been demonstrated by PSPICE simulations with TSMC CMOS 0.18 μm process parameters. 展开更多
关键词 VDTA quadrature oscillator CURRENT-MODE CIRCUITS
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A New CMOS Current Controlled Quadrature Oscillator Based on a MCCII 被引量:1
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作者 Ashwek Ben Saied Samir Ben Salem Dorra Sellami Masmoudi 《Circuits and Systems》 2011年第4期269-273,共5页
In this paper, we propose a design of a current controlled Quadrature Sinusoidal Oscillator. The proposed circuit employs three optimized Multi-output translinear second generation current conveyer (MCCII). The oscill... In this paper, we propose a design of a current controlled Quadrature Sinusoidal Oscillator. The proposed circuit employs three optimized Multi-output translinear second generation current conveyer (MCCII). The oscillation condition and the oscillation frequency are independently controllable. The proposed Quadrature Oscillator frequency can be tuned in the range of [198 MHz –261 MHz] by a simple variation of a DC current. PSpice simulation results are performed using CMOS 0.35 μm process of AMS. 展开更多
关键词 quadrature Sinusoidal oscillator Optimized MCCII
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Floquet Eigenvectors Theory of Pulsed Bias Phase and Quadrature Harmonic Oscillators
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作者 Fabrizio Palma Stefano Perticaroli 《Circuits and Systems》 2012年第1期72-81,共10页
The paper presents an analytical derivation of Floquet eigenvalues and eigenvectors for a class of harmonic phase and quadrature oscillators. The derivation refers in particular to systems modeled by two parallel RLC ... The paper presents an analytical derivation of Floquet eigenvalues and eigenvectors for a class of harmonic phase and quadrature oscillators. The derivation refers in particular to systems modeled by two parallel RLC resonators with pulsed energy restoring. Pulsed energy restoring is obtained through parallel current generators with an impulsive characteristic triggered by the resonators voltages. In performing calculation the initial hypothesis of the existence of stable oscillation is only made, then it is verified when both oscillation amplitude and eigenvalues/eigenvectors are deduced from symmetry conditions on oscillator space state. A detailed determination of the first eigenvector is obtained. Remaining eigenvectors are hence calculated with realistic approximations. Since Floquet eigenvectors are acknowledged to give the correct decomposition of noise perturbations superimposed to the oscillator space state along its limit cycle, an analytical and compact model of their behavior highlights the unique phase noise properties of this class of oscillators. 展开更多
关键词 FLOQUET EIGENVECTORS Noise Decomposition PHASE and quadrature oscillators Pulsed Bias oscillator oscillator PHASE Noise
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CMOS Phase and Quadrature Pulsed Differential Oscillators Coupled through Microstrip Delay-Lines
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作者 Francesco Stilgenbauer Stefano Perticaroli Fabrizio Palma 《Circuits and Systems》 2014年第8期181-190,共10页
An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator re... An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator refilled through a couple of current pulse generator circuits. The phase and quadrature coupling between the two differential oscillators is achieved using delayed replicas of generated fundamentals from a resonator as driving signal of pulse generator injecting in the other resonator. The delayed replicas are obtained by microstrip-based delay-lines. A 2.4 - 2.5 GHz VCO has been implemented in a 150 nm RF CMOS process. Simulations showed at 1 MHz offset a phase noise of -139.9 dBc/Hz and a FOM of -189.1 dB. 展开更多
关键词 Voltage Controlled oscillator MICROSTRIP Delay-Line PHASE and quadrature PHASE Noise
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Voltage-Mode Third-Order Quadrature Sinusoidal Oscillator Using VDBAs
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作者 Kanhaiya Lal Pushkar 《Circuits and Systems》 2017年第12期285-292,共8页
This paper presents a third-order quadrature sinusoidal oscillator (TOQSO) using two voltage differencing buffered amplifiers (VDBAs), three capacitors and a resistor. The new topology provides two quadrature voltage ... This paper presents a third-order quadrature sinusoidal oscillator (TOQSO) using two voltage differencing buffered amplifiers (VDBAs), three capacitors and a resistor. The new topology provides two quadrature voltage outputs. The condition of oscillation (CO) and frequency of oscillation (FO) are electronically independently controllable by the separate transconductance of the VDBAs. The workability of the proposed TOQSO is confirmed by SPICE (Version 16.5) simulation using Taiwan semiconductor manufacturing company (TSMC) 0.18 μm process parameters. 展开更多
关键词 VOLTAGE Differencing Buffered AMPLIFIER THIRD-ORDER quadrature Sinusoidal oscillator VOLTAGE-MODE
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Electronically Controllable Quadrature Sinusoidal Oscillator Using VD-DIBAs
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作者 Kanhaiya Lal Pushkar 《Circuits and Systems》 2018年第3期41-48,共8页
A new voltage-mode quadrature sinusoidal oscillator (QSO) using two voltage differencing-differential input buffered amplifiers (VD-DIBAs) and only three passive components (two capacitors and a resistor) is presented... A new voltage-mode quadrature sinusoidal oscillator (QSO) using two voltage differencing-differential input buffered amplifiers (VD-DIBAs) and only three passive components (two capacitors and a resistor) is presented. The proposed QSO circuit offers advantages of independent electronic control of both oscillation frequency and condition of oscillation, availability of two quadrature voltage outputs and low active and passive sensitivities. SPICE simulation results have been included using 0.35 μm MIETEC technology to confirm the validity of the proposed QSO oscillator. 展开更多
关键词 Voltage Differencing-Differential Input Buffered Amplifier VOLTAGE-MODE quadrature Sinusoidal oscillator
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Current-Controlled CFTA Based Fractional Order Quadrature Oscillators
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作者 Tada Comedang Pattana Intani 《Circuits and Systems》 2016年第13期4201-4212,共12页
This paper presents a study of fractional order quadrature oscillators based on current-controlled current follower transconductance amplifiers (CCCFTA). The design realisation and performance of the fractional order ... This paper presents a study of fractional order quadrature oscillators based on current-controlled current follower transconductance amplifiers (CCCFTA). The design realisation and performance of the fractional order quadrature oscillators have been presented. The quadrature oscillators are constructed using three fractional capacitors of orders α = 0.5. The fractional capacitor is not available on the market or in the PSPICE program. Fortunately, the fractional capacitor can be realised by using the approximate method for the RC ladder network approximation. The oscillation frequency and oscillation condition can be electronically/orthogonally controlled via input bias currents. Due to high-output impedances, the proposed circuit enables easy cascading in current-mode (CM). The PSPICE simulation results are depicted, and the given results agree well with the anticipated theoretical outcomes. 展开更多
关键词 Fractional Order quadrature oscillator Current-Controlled Current Follower Transconductance Amplifier
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Dual-Delay-Path Ring Oscillator with Self-Biased Delay Cells for Clock Generation
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作者 Agord de Matos Pinto Jr Raphael Ronald Noal Souza +2 位作者 Mateus Biancarde Castro Eduardo Rodrigues de Lima Leandro Tiago Manêra 《Circuits and Systems》 2023年第6期19-28,共10页
This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structur... This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply V<sub>DD</sub> = 1.8 V, the resulting set of performance parameters include power consumption P<sub><sub></sub>DC</sub> = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving P<sub>DC</sub> and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool. 展开更多
关键词 Phase Locked Loop (PLL) voltage-controlled Ring oscillators (VCRO) Dual-Delay-Path DDP Delay Cells
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Phase and Quadrature Pulsed Bias LC-CMOS VCO
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作者 Stefano Perticaroli Fabrizio Palma Adriano Carbone 《Circuits and Systems》 2011年第1期18-24,共7页
Pulsed bias is an attempt to improve the performance of oscillators in integrated circuits as a result of architectural innovation. Given the relatively low value of resonator quality factor achievable on-chip, for a ... Pulsed bias is an attempt to improve the performance of oscillators in integrated circuits as a result of architectural innovation. Given the relatively low value of resonator quality factor achievable on-chip, for a specified bias voltage level, pulsed bias may result in a lower power consumption and in an improvement of the spectral purity of the oscillation. The main drawback of this approach is the need to introduce a certain time delay in order to properly position pulses with respect to oscillation waveform. Delay accumulation requires further energy dissipation and introduce additional jitter. In this paper we present a new architecture capable to avoid unnecessary delay, based on the idea to apply the pulsed bias approach to a quadrature oscillator. A ?rst circuit-level implementation of this concept is presented with simulation results. 展开更多
关键词 PHASE And quadrature VCO Pulsed BIAS oscillator FLOQUET EIGENVECTORS Noise Decomposition
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A micromechanical bridge-shaped voltage-controlled oscillator
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作者 HAN Jianqiang ZHU Changchun ZHAO Hongpo LIU Junhua SHAO Jun 《Science China(Technological Sciences)》 SCIE EI CAS 2004年第1期26-32,共7页
A novel micromechanical bridge-shaped voltage-controlled oscillator with high Q value was fabricated. The core of this kind of oscillators is an electrothermally excited and piezoresistively detected micromechanical b... A novel micromechanical bridge-shaped voltage-controlled oscillator with high Q value was fabricated. The core of this kind of oscillators is an electrothermally excited and piezoresistively detected micromechanical bridge resonator. Its resonance frequency can be adjusted by changing the DC voltage applied to the Wheatstone bridge. Theoretical analysis and experimental data show that its resonance frequency is linear with the square of the DC voltage. The linearity is better than 0.16% and the adjustable frequency range excels 17.15%. 展开更多
关键词 voltage-controlled oscillator microbridge resonator MEMS.
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A Survey of Voltage-Controlled-Oscillator-Based ?∑ ADCs
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作者 Yi Zhong Nan Sun 《Tsinghua Science and Technology》 SCIE EI CAS CSCD 2022年第3期472-480,共9页
The benefits of technology scaling have fueled interest in realizing time-domain oversampling(?∑) of Analog-to-Digital Converters(ADCs). Voltage-Controlled Oscillators(VCO) are increasingly used to design ?∑ADCs bec... The benefits of technology scaling have fueled interest in realizing time-domain oversampling(?∑) of Analog-to-Digital Converters(ADCs). Voltage-Controlled Oscillators(VCO) are increasingly used to design ?∑ADCs because of their simplicity, high digitization, and low-voltage tolerance, making them a promising candidate to replace the classical Operational Transconductance Amplifier(OTA) in ?∑ ADC design. This work aims to provide a summary of the fully VCO-based ?∑ ADCs that are highly digital and scaling-friendly. This work presents a review of first-order and high-order VCO-based ?∑ ADCs with several techniques and architectures to mitigate the nonidealities introduced by VCO, achieving outstanding power efficiency. The contributions and drawbacks of these techniques and architectures are also discussed. 展开更多
关键词 voltage-controlled oscillator(VCO) Analog-to-Digital Converter(ADC) oversampling(?∑)ADC time-domain signal processing VCO-based?∑ADC
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具有高线性调谐特性的1.2GHz CMOS频率综合器 被引量:4
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作者 李振荣 庄奕琪 龙强 《电子科技大学学报》 EI CAS CSCD 北大核心 2012年第6期853-858,共6页
基于0.18μmRF CMOS工艺实现了一个1.2GHz高线性低噪声正交输出频率综合器,该综合器集成了一种高线性低调谐灵敏度的低噪LC压控振荡器;降低了系统对锁相环中其他模块的要求;基于源板耦合逻辑实现了具有低开关噪声特性的正交输出高... 基于0.18μmRF CMOS工艺实现了一个1.2GHz高线性低噪声正交输出频率综合器,该综合器集成了一种高线性低调谐灵敏度的低噪LC压控振荡器;降低了系统对锁相环中其他模块的要求;基于源板耦合逻辑实现了具有低开关噪声特性的正交输出高速二分频,采用“与非”触发器结构实现了高速双模预分频,并集成了数控鉴频鉴相器和全差分电荷泵,获得了良好的频率综合器环路性能.对于1.21GHz的本振信号,在100kHz和1MHz频偏处的相位噪声分别为-99.1dBc/Hz和-123.48dBc/Hz.该频率综合器具有从1.13~1.33GHz的输出频率范围。工作电压1.8V时,芯片整体功耗20.4mW,芯片面积(1.5×1.25)mm^2。 展开更多
关键词 频率综合器 相位噪声 锁相环 正交输出 压控振荡器
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KHN滤波器频率特性的进一步研究 被引量:2
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作者 李安 郭静 +2 位作者 薛卫东 袁战军 黄荷洁 《海南大学学报(自然科学版)》 CAS 2010年第2期144-147,共4页
提出了一种能同时或能分别实现低通、高通和带通滤波的多功能KHN滤波器,通过调节其电阻比,其电路也能被修改成一个正交振荡器,而且其电路的极点频率和品质因数能够被独立地,精确地调节.该电路使用了3个集成运放、2个电容和9个电阻,且使... 提出了一种能同时或能分别实现低通、高通和带通滤波的多功能KHN滤波器,通过调节其电阻比,其电路也能被修改成一个正交振荡器,而且其电路的极点频率和品质因数能够被独立地,精确地调节.该电路使用了3个集成运放、2个电容和9个电阻,且使用的元件较少,性价比高,计算机仿真证明它正确有效. 展开更多
关键词 正交振荡器 通用滤波器 集成运算放大器
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基于MCCC的电流模式双二阶滤波器和正交振荡器 被引量:2
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作者 李志军 胡洪波 《仪器仪表学报》 EI CAS CSCD 北大核心 2010年第4期753-757,共5页
提出了一种新颖的电流模式电路,该电路在不改变内部结构的情况下既能实现双二阶通用滤波器,又能实现正交振荡器。电路结构简单,由5个MCCCII(多端输出的电流控制电流传输器)和2个接地电容构成。该电路在实现滤波器时能同时实现高通、低... 提出了一种新颖的电流模式电路,该电路在不改变内部结构的情况下既能实现双二阶通用滤波器,又能实现正交振荡器。电路结构简单,由5个MCCCII(多端输出的电流控制电流传输器)和2个接地电容构成。该电路在实现滤波器时能同时实现高通、低通、带通、带阻和全通等滤波功能,滤波器的品质因素和极点频率可以通过改变MCCCII的偏置电流实现线性独立调节;该电路在实现振荡器时可以实现正交信号输出,且振荡频率线性可调。面向实际电路完成了计算机的仿真分析,实验结果与理论分析完全吻合。 展开更多
关键词 电流模式 电流控制电流传输器 通用滤波器 正交振荡器
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截锥壳驻波颤振极限环研究 被引量:2
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作者 范晨光 杨翊仁 鲁丽 《西南交通大学学报》 EI CSCD 北大核心 2010年第5期713-717,共5页
为研究大挠度非线性位移-应变条件下,截锥壳非线性颤振响应特性,基于活塞理论的气动力法,建立了超音速截锥壳非线性气动弹性运动方程.采用微分求积法对方程进行离散化变换,在驻波颤振假设下,用低阶固有模态缩减自由度数,模拟驻波颤振极... 为研究大挠度非线性位移-应变条件下,截锥壳非线性颤振响应特性,基于活塞理论的气动力法,建立了超音速截锥壳非线性气动弹性运动方程.采用微分求积法对方程进行离散化变换,在驻波颤振假设下,用低阶固有模态缩减自由度数,模拟驻波颤振极限环幅值及随气动参数的变化过程.结果表明:前6阶模态下缩减自由度数,可获得较为精确的解;当气动压力参数增大至7 312时,系统经过Hopf分叉后进入极限环运动. 展开更多
关键词 截锥壳 颤振 极限环 微分求积法 活塞理论
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基于超谐波注入锁定的低相噪QVCO的设计 被引量:2
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作者 许亚兰 江金光 刘江华 《半导体技术》 CAS CSCD 北大核心 2015年第3期182-187,204,共7页
对基于注入锁定的正交压控振荡器(QVCO)电路进行了研究和分析,设计了一个低相位噪声、低相位误差的QVCO电路,该电路由两个电感电容压控振荡器(LC VCO)在正交相位进行超谐波耦合,通过一个频率倍增器在交叉耦合对的共模信号点注入同步信... 对基于注入锁定的正交压控振荡器(QVCO)电路进行了研究和分析,设计了一个低相位噪声、低相位误差的QVCO电路,该电路由两个电感电容压控振荡器(LC VCO)在正交相位进行超谐波耦合,通过一个频率倍增器在交叉耦合对的共模信号点注入同步信号。通过对相位误差公式的推导,提出了降低相位误差的方法,由于该电路在共模点采用二倍频取样,抑制了尾电流的闪烁噪声,降低了相位噪声。电路基于TSMC 0.18μm互补金属氧化物半导体(CMOS)工艺实现,测试结果表明,当谐振频率从4.5 GHz调谐到4.9 GHz时,在电源电压为1.8 V时,电路消耗功率为13 m W,1 MHz频偏处的单边带(SSB)相位噪声为-129.95 d Bc/Hz,与传统的QVCO相比,噪声性能得到了改善。 展开更多
关键词 正交压控振荡器(QVCO) 注入锁定 倍频器 相位误差 相位噪声
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通信系统中数字上变频技术的研究与设计 被引量:7
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作者 铁奎 张慷 凌云志 《电子设计工程》 2012年第15期190-192,共3页
为了将通信系统中数字基带信号调制到中频信号上,采用数字上变频技术,通过对数字I、Q两路基带信号进行FIR成形滤波、半带插值滤波、数字混频处理得到正交调制后的中频信号,最后经MATLAB仿真分析得到相应的时域和频域图,来验证电路设计... 为了将通信系统中数字基带信号调制到中频信号上,采用数字上变频技术,通过对数字I、Q两路基带信号进行FIR成形滤波、半带插值滤波、数字混频处理得到正交调制后的中频信号,最后经MATLAB仿真分析得到相应的时域和频域图,来验证电路设计的有效性。 展开更多
关键词 数字上变频 半带滤波器 数字本振 数字正交混频器
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全球卫星导航系统接收机的正交二分频器设计 被引量:3
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作者 尹喜珍 于云丰 +1 位作者 马成炎 叶甜春 《光学精密工程》 EI CAS CSCD 北大核心 2012年第5期1015-1021,共7页
将全球卫星导航系统(GNSS)接收机用于手持移动设备必须降低正交二分频器等大功耗模块的功耗,因此,本文提出了工作于1V电压以下的正交二分频器。使用提出的正交二分频器可使电路在各工艺角下高速稳定的工作,并大大降低模块的功耗。首先,... 将全球卫星导航系统(GNSS)接收机用于手持移动设备必须降低正交二分频器等大功耗模块的功耗,因此,本文提出了工作于1V电压以下的正交二分频器。使用提出的正交二分频器可使电路在各工艺角下高速稳定的工作,并大大降低模块的功耗。首先,介绍已有的高速二分频器。接着,计算了所提出结构的直流静态偏置,并对提出的锁存器进行小信号建模和分析。最后,根据小信号模型分析得到的条件和GNSS接收机的应用要求,设计了提出的低功耗结构。实验结果表明:提出的二分频器最高工作频率为6.55GHz,最低可工作到0.25GHz,消耗电流为0.8mA,占用面积为0.014 4mm2。提出的电路结构在0.13μm CMOS工艺上实现,可稳定工作于1V电压下,目前已成功应用于低功耗的移动GNSS接收机中。 展开更多
关键词 全球卫星导航系统 电流模逻辑 二分频器 正交本振 低功耗
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接收相参雷达相干检波改进设计与仿真 被引量:2
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作者 周亚飞 赵修斌 胡健生 《兵工自动化》 2010年第10期6-8,12,共4页
为提高传统雷达信号处理系统的性能,提出雷达中频信号数字正交解调和相参信号的提取方法。对接收相参雷达相干检波进行改进研究,采用中频采样和数字正交解调代替模拟相干检波器,采用数字混频滤波提取发射信号初始相位,并采用某型接收相... 为提高传统雷达信号处理系统的性能,提出雷达中频信号数字正交解调和相参信号的提取方法。对接收相参雷达相干检波进行改进研究,采用中频采样和数字正交解调代替模拟相干检波器,采用数字混频滤波提取发射信号初始相位,并采用某型接收相参雷达实际采集信号进行了仿真验证。仿真结果表明:改进后雷达信号处理效果有明显提升,改进方案对早期雷达数字化改造和现代雷达信号处理系统设计具有借鉴意义。 展开更多
关键词 接收相参雷达 中频采样 正交解调 混频滤波 数控振荡器
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一种抑制激波计算中数值振荡现象的双重小波收缩方法 被引量:2
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作者 赵勇 宗智 王天霖 《应用数学和力学》 CSCD 北大核心 2014年第6期620-629,共10页
在激波数值计算中,容易出现数值振荡的问题,振荡激烈时会掩盖真实解,为此提出了许多高精度复杂计算格式或采用人工粘性抑制数值振荡.从信号处理的角度,提出双重小波收缩方法,它能自适应提取激波数值振荡解中的真实物理解.先用局部微分... 在激波数值计算中,容易出现数值振荡的问题,振荡激烈时会掩盖真实解,为此提出了许多高精度复杂计算格式或采用人工粘性抑制数值振荡.从信号处理的角度,提出双重小波收缩方法,它能自适应提取激波数值振荡解中的真实物理解.先用局部微分求积法求解浅水波方程和理想流体Euler运动方程中的激波问题,发现其数值振荡现象严重,然后采用双重小波收缩方法对其处理,获得了无数值振荡解,它能准确捕捉激波的位置并且保持激波结构.相比于复杂的Riemann(黎曼)求解格式,借助小波收缩方法,可以采用相对简单的计算格式如微分求积法求解激波问题. 展开更多
关键词 激波 数值振荡 小波收缩 微分求积法 浅水波方程 EULER方程
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