DESIGN OF QUASI-CYCLIC LDPC CODES BASED ON EUCLIDEAN GEOMETRIES

A new method for constructing Quasi-Cyclic (QC) Low-Density Parity-Check (LDPC) codes based on Euclidean Geometry (EG) is presented. The proposed method results in a class of QC-LDPC codes with girth of at least 6 and the designed codes perform very close to the Shannon limit with iterative decoding. Simulations show that the designed QC-LDPC codes have almost the same performance with the existing EG-LDPC codes.

Combinatorial design-based quasi-cyclic LDPC codes with girth eight

This paper presents a novel regular Quasi-Cyclic (QC)Low Density Parity Check (LDPC)codes with columnweight three and girth at least eight.These are designed on the basis of combinatorial design in which subsets applied for the construction of circulant matrices are determined by a particular subset.Considering the nonexistence of cycles four and six in the structure of the parity check matrix,a bound for their minimum weight is proposed.The simtdations conducted confirm that without applying a masking technique,the newly implemented codes have a performance similar to or better than other well-known codes.This is evident in the waterfall region, while their error floor at very low Bit Error Rate (BER)is expected.

On the Girth of Tanner (5,7) Quasi-Cyclic LDPC Codes

The girth plays an important role in the design of LDPC codes. In order to determine the girth of Tanner(5,7) quasi-cyclic( QC) LDPC codes with length 7p for p being a prime with the form 35 m + 1,the cycles of lengths 4,6,8,and 10 are analyzed. Then these cycles are classified into sixteen categories,each of which can be expressed as an ordered block sequence,or a certain type. It is also shown that the existence of these cycles is equal to polynomial equations over Fpwho has a 35th unit root. We check if these polynomial equations have a 35th unit root and obtain the girth values of Tanner(5,7) QC LDPC codes.

Quasi-cyclic LDPC codes with high-rate and low error floor based on Euclidean geometries

An improved Euclidean geometry approach to design quasi-cyclic （QC） Low-density parity-check （LDPC） codes with high-rate and low error floor is presented. The constructed QC-LDPC codes with high-rate have lower error floor than the original codes. The distribution of the minimum weight codeword is analyzed, and a sufficient existence condition of the minimum weight codeword is found. Simulations show that a lot of QC-LDPC codes with lower error floor can be designed by reducing the number of the minimum weight codewords satisfying this sufficient condition.

Design and Efficient Hardware Implementation Schemes for Non-Quasi-Cyclic LDPC Codes

The design of a high-speed decoder using traditional partly parallel architecture for Non-Quasi-Cyclic（NQC） Low-Density Parity-Check（LDPC） codes is a challenging problem due to its high memory-block cost and low hardware utilization efficiency. In this paper, we present efficient hardware implementation schemes for NQCLDPC codes. First, we propose an implementation-oriented construction scheme for NQC-LDPC codes to avoid memory-access conflict in the partly parallel decoder. Then, we propose a Modified Overlapped Message-Passing（MOMP） algorithm for the hardware implementation of NQC-LDPC codes. This algorithm doubles the hardware utilization efficiency and supports a higher degree of parallelism than that used in the Overlapped Message Passing（OMP） technique proposed in previous works. We also present single-core and multi-core decoder architectures in the proposed MOMP algorithm to reduce memory cost and improve circuit efficiency. Moreover, we introduce a technique called the cycle bus to further reduce the number of block RAMs in multi-core decoders. Using numerical examples, we show that, for a rate-2/3, length-15360 NQC-LDPC code with 8.43-d B coding gain for Binary PhaseShift Keying（BPSK） in an Additive White Gaussian Noise（AWGN） channel, the decoder with the proposed scheme achieves a 23.8%–52.6% reduction in logic utilization per Mbps and a 29.0%–90.0% reduction in message-memory bits per Mbps.

Design of Protograph LDPC-Coded MIMO-VLC Systems with Generalized Spatial Modulation

This paper investigates the bit-interleaved coded generalized spatial modulation(BICGSM) with iterative decoding(BICGSM-ID) for multiple-input multiple-output(MIMO) visible light communications(VLC). In the BICGSM-ID scheme, the information bits conveyed by the signal-domain(SiD) symbols and the spatial-domain(SpD) light emitting diode(LED)-index patterns are coded by a protograph low-density parity-check(P-LDPC) code. Specifically, we propose a signal-domain symbol expanding and re-allocating(SSER) method for constructing a type of novel generalized spatial modulation(GSM) constellations, referred to as SSERGSM constellations, so as to boost the performance of the BICGSM-ID MIMO-VLC systems.Moreover, by applying a modified PEXIT(MPEXIT) algorithm, we further design a family of rate-compatible P-LDPC codes, referred to as enhanced accumulate-repeat-accumulate(EARA) codes,which possess both excellent decoding thresholds and linear-minimum-distance-growth property. Both analysis and simulation results illustrate that the proposed SSERGSM constellations and P-LDPC codes can remarkably improve the convergence and decoding performance of MIMO-VLC systems. Therefore, the proposed P-LDPC-coded SSERGSM-mapped BICGSMID configuration is envisioned as a promising transmission solution to satisfy the high-throughput requirement of MIMO-VLC applications.

Construction of Protograph LDPC Codes Based on the Convolution Neural Network

This paper presents an intelligent protograph construction algorithm.Protograph LDPC codes have shown excellent error correction performance and play an important role in wireless communications.Random search or manual construction are often used to obtain a good protograph,but the efficiency is not high enough and many experience and skills are needed.In this paper,a fast searching algorithm is proposed using the convolution neural network to predict the iterative decoding thresholds of protograph LDPC codes effectively.A special input data transformation rule is applied to provide stronger generalization ability.The proposed algorithm converges faster than other algorithms.The iterative decoding threshold of the constructed protograph surpasses greedy algorithm and random search by about 0.53 dB and 0.93 dB respectively under 100 times of density evolution.Simulation results show that quasi-cyclic LDPC(QC-LDPC)codes constructed from the proposed algorithm have competitive performance compared to other papers.

Quantum quasi-cyclic low-density parity-check error-correcting codes

In this paper, we propose the approach of employing circulant permutation matrices to construct quantum quasicyclic （QC） low-density parity-check （LDPC） codes. Using the proposed approach one may construct some new quantum codes with various lengths and rates of no cycles-length 4 in their Tanner graphs. In addition, these constructed codes have the advantages of simple implementation and low-complexity encoding. Finally, the decoding approach for the proposed quantum QC LDPC is investigated.

Quaternary quasi-cyclic codes

Quasi-cyclic codes of length mn over Z4 are shown to be equivalent to A-submodules of A^n, where A = Z4[x]/（x^m - 1）. In the case of m being odd, all quasi-cyclic codes are shown to be decomposable into the direct sum of a fixed number of cyclic irreducible A-submodules. Finally the distinct quasi-cyclic codes as well as some specific subclasses are enumerated.

基于可靠度差值特征的自适应判决多元LDPC译码算法

利用变量节点符号可靠度在迭代过程中的分布特征,提出了一种基于可靠度差值特征的自适应判决多元低密度奇偶校验(Low Density Parity Check, LDPC)译码算法。整个迭代过程划分为两个阶段,针对不同阶段节点可靠度的差值特征分别采用不同的判决策略:前期阶段,采用传统的基于最大可靠度的判决策略;后期阶段,根据最大、次大可靠度之间的差值特征,设计自适应的码元符号判决策略。仿真结果表明,所提算法在相当的译码复杂度前提下,能获得0.15~0.4 dB的性能增益。同时,对于列重较小的LDPC码,具有更低的译码错误平层。

一种非规则广义LDPC码的构造方法

广义低密度奇偶校验(Generalized Low-Density Parity-Check, GLDPC)码把低密度奇偶校验(Low-Density Parity-Check, LDPC)码中的单奇偶校验(Single Parity-Check, SPC)节点替换为校验能力更强的广义约束(Generalized Constraint, GC)节点,使其在中短码和低码率的条件下具有更低的误码率。传统GLDPC码要求基矩阵的行重等于分量码的码长,这限制了GLDPC码构造的灵活性。另外,相比于传统GLDPC码中GC节点位置的随机选取,GC节点的位置选择在GLDPC码的误码率性能上有一定的优化空间。针对以上两点,提出了一种基于渐进边增长(Progressive Edge-Growth, PEG)算法的非规则GLDPC码构造方法和一种基于Tanner图边数的GC节点位置选择算法。使用PEG算法生成的非规则LDPC码作为本地码,根据本地码的校验节点度使用多种分量码,结合GC节点位置选择算法构造非规则GLDPC码。仿真结果表明,与传统方法构造的GLDPC码相比,基于Tanner图边数的GC节点位置选择算法构造的非规则PEG-GLDPC码在误码率和译码复杂度上均得到明显改善。

基于分层最小和译码的RS-LDPC级联码改进算法

RS-LDPC级联码能够有效提高数据传输的可靠性和系统的容错能力,在5G通信等领域中得到了广泛的应用,且在6G中具有很好的应用前景。但是RS-LDPC级联码与单码相比具有计算复杂度高、不易于在硬件上实现的不足,因此提出一种基于分层最小和的RS-LDPC级联码改进译码算法,将LDPC码的校验矩阵分解成多个子矩阵,在不同子矩阵层次上并行计算。此外,还引入了新的关于校验节点信息更新的简化函数,旨在保证译码性能的同时降低计算复杂度,达到易于硬件实现的目的。结果表明改进型分层最小和算法复杂度大大降低,且在性能上优于传统BP译码0.25 dB左右。

基于阿贝尔群上的差分集构造LDPC码

本文给出了区组长度为3、4和5的平衡不完全区组设计,将设计的关联矩阵作为校验矩阵,从而构造出3种低密度奇偶校验码(LDPC,low-density parity-check code)。由于这些校验矩阵是准循环矩阵,所以构造的码是拟循环LDPC码(QC-LDPC,quasi-cyclic LDPC)。计算码的相关参数,并针对具体的例子通过与类随机码的译码性能进行分析比较,结果显示,所构造的码具有较好的性能。

Low-Density Parity-Check Codes:Highway to Channel Capacity

Low-density parity-check(LDPC)codes are not only capacity-approaching,but also greatly suitable for high-throughput implementation.Thus,they are the most popular codes for high-speed data transmission in the past two decades.Thanks to the low-density property of their parity-check matrices,the optimal maximum a posteriori probability decoding of LDPC codes can be approximated by message-passing decoding with linear complexity and highly parallel nature.Then,it reveals that the approximation has to carry on Tanner graphs without short cycles and small trapping sets.Last,it demonstrates that well-designed LDPC codes with the aid of computer simulation and asymptotic analysis tools are able to approach the channel capacity.Moreover,quasi-cyclic(QC)structure is introduced to significantly facilitate their high-throughput implementation.In fact,compared to the other capacity-approaching codes,QC-LDPC codes can provide better area-efficiency and energy-efficiency.As a result,they are widely applied in numerous communication systems,e.g.,Landsat satellites,Chang’e Chinese Lunar mission,5G mobile communications and so on.What’s more,its extension to non-binary Galois fields has been adopted as the channel coding scheme for BeiDou navigation satellite system.

Weighted symbol-flipping decoding algorithm for nonbinary LDPC codes with flipping patterns

A novel low-complexity weighted symbol-flipping algorithm with flipping patterns to decode nonbinary low-density parity-check codes is proposed. The proposed decoding procedure updates the hard-decision received symbol vector iteratively in search of a valid codeword in the symbol vector space. Only one symbol is flipped in each iteration, and symbol flipping function, which is employed as the symbol flipping metric, combines the number of failed checks and the reliabilities of the received bits and calculated symbols. A scheme to avoid infinite loops and select one symbol to flip in high order Galois field search is also proposed. The design of flipping pattern＇s order and depth, which is dependent of the computational requirement and error performance, is also proposed and exemplified. Simulation results show that the algorithm achieves an appealing tradeoff between performance and computational requirement over relatively low Galois field for short to medium code length.

Design of good QC-LDPC codes without small girth in the p-plane

A construction method based on the p-plane to design high-girth quasi-cyclic low-density parity-check （QC-LDPC） codes is proposed. Firstly the good points in every line of the p-plane can be ascertained through filtering the bad points, because the designed parity-check matrixes using these points have the short cycles in Tanner graph of codes. Then one of the best points from the residual good points of every line in the p-plane will be found, respectively. The optimal point is also singled out according to the bit error rate （BER） performance of the QC-LDPC codes at last. Explicit necessary and sufficient conditions for the QC-LDPC codes to have no short cycles are presented which are in favor of removing the bad points in the p-plane. Since preventing the short cycles also prevents the small stopping sets, the proposed construction method also leads to QC-LDPC codes with a higher stopping distance.

Construction of protograph LDPC codes with circular generator matrices

The application of protograph low density parity check （LDPC） codes involves the encoding complexity problem. Since the generator matrices are dense, and if the positions of ＂1＂ s are irregularity, the encoder needs to store every ＂1＂ of the generator matrices by using huge chip area. In order to solve this problem, we need to design the protograph LDPC codes with circular generator matrices. A theorem concerning the circulating property of generator matrices of nonsingular protograph LDPC codes is proposed. The circulating property of generator matrix of nonsingular protograph LDPC codes can be obtained from the corresponding quasi-cyclic parity check matrix. This paper gives a scheme of constructing protograph LDPC codes with circulating generator matrices, and it reveals that the fast encoding algorithm of protograph LDPC codes has lower encoding complexity under the condition of the proposed theorem. Simulation results in ad- ditive white Gaussian noise （AWGN） channels show that the bit error rate （BER） performance of the designed codes based on the proposed theorem is much better than that of GB20600 LDPC codes and Tanner LDPC codes.

Construction of time-frequency codes based on protograph LDPC codes in OFDM communication systems

This paper proposes a scheme to construct time- frequency codes based on protograph low density parity check （LDPC） codes in orthogonal frequency division multiplexing （OFDM） communication systems. This approach synthesizes two techniques： protograph LDPC codes and OFDM. One symbol of encoded information by protograph LDPC codes corresponds to one sub-carrier, namely the length of encoded information equals to the number of sub-carriers. The design of good protograph LDPC codes with short lengths is given, and the proposed proto- graph LDPC codes can be of fast encoding, which can reduce the encoding complexity and simplify encoder hardware implementa- tion. The proposed approach provides a higher coding gain in the Rayleigh fading channel. The simulation results in the Rayleigh fading channel show that the bit error rate （BER） performance of the proposed time-frequency codes is as good as random LDPC- OFDM codes and is better than Tanner LDPC-OFDM codes under the condition of different fading coefficients.

NEW CONSTRUCTIONS OF LDPC CODES BASED ON CIRCULANT PERMUTATION MATRICES FOR AWGN CHANNEL

Two new design approaches for constructing Low-Density Parity-Check(LDPC) codes are proposed.One is used to design regular Quasi-Cyclic LDPC(QC-LDPC) codes with girth at least 8.The other is used to design irregular LDPC codes.Both of their parity-check matrices are composed of Circulant Permutation Matrices(CPMs).When iteratively decoded with the Sum-Product Algorithm(SPA),these proposed codes exhibit good performances over the AWGN channel.

Algebraic-Based Nonbinary LDPC Codes with Flexible Field Orders and Code Rates

In this paper, we study the rank of matrices over GF(2~p),and propose two construction methods for algebraic-based nonbinary LDPC codes from an existing LDPC code, referred to as the original code. By multiplying all elements of each column of the binary parity-check matrix H corresponding to the original code with the same nonzero element of any field, the first class of nonbinary LDPC codes with flexible field order is proposed. The second method is to replace the nonzero elements of some columns in H with different nonzero field elements in a given field, and then another class of nonbinary LDPC codes with various rates is obtained. Simulation results show that the proposed nonbinary LDPC codes perform well over the AWGN channel with the iterative decoding algorithms.