Precoding and space-time block coding （STBC）techniques using the uniform channel decomposition （UCD）are proposed to improve the bit error rate （BER） of themultiple-antenna communication system, but at a cost of ...Precoding and space-time block coding （STBC）techniques using the uniform channel decomposition （UCD）are proposed to improve the bit error rate （BER） of themultiple-antenna communication system, but at a cost of areduced data rate. In order to achieve a higher overall systemperformance, a novel adaptive transceiver architecture whichflexibly combines both UCD and UCD ＋ STBC technologies isproposed. The channel state information （CSI） feedback pathwas added to the precoder to select which coding method wasto be used, i.e. UCD alone or UCD ＋ STBC. With thesmaller constellation sizes, Matlab simulation results showthat, the adaptive transceiver architecture will select the UCD-only mode under the higher SNR conditions in order to achievea higher bit rate. The UCD ＋ STBC mode will be selectedunder the lower SNR conditions （e. g., SNR 〈 10 dB） inorder to maintain good BER performance at the cost of areduced data rate. This architecture was implemented andverified using both UMC 0.18 ASIC process technology and aXilinx xc4vlx Virtex-4 FPGA at 150 MHz. The simulationresults demonstrate that the required number of reconfigurablearithmetic unit slices grows linearly with the channel matrixsize, while the number of adder array unit and reconfigurablelogic unit slices increases slightly with the constellation size.展开更多
A reconfigurable multi-mode multi-band transceiver for low power short-range wireless communication applications is presented.Its low intermediate frequency(IF) receiver with 3 MHz IF carrier frequency and the direct-...A reconfigurable multi-mode multi-band transceiver for low power short-range wireless communication applications is presented.Its low intermediate frequency(IF) receiver with 3 MHz IF carrier frequency and the direct-conversion transmitter support reconfigurable signal bandwidths from 250 kHz to 2 MHz and support a highest data rate of 3 Mbps for MSK modulation.An integrated multi-band PLL frequency synthesizer is utilized to provide the quadrature LO signals from about 300 MHz to 1 GHz for the transceiver multi-band application. The transceiver has been implemented in a 0.18μm CMOS process.The measurement results at the maximum gain mode show that the receiver achieves a noise figure(NF) of 4.9/5.5 dB and an input 3rd order intermodulation point(IIP3) of-19.6/-18.2 dBm in 400/900 MHz band.The transmitter working in 400/900 MHz band can deliver 10.2/7.3 dBm power to a 50Ωload.The transceiver consumes 32.9/35.6 mW in receive mode and 47.4/50.1 mW in transmit mode in 400/900 MHz band,respectively.展开更多
基金The National Natural Science Foundation of China(No.61376025)the Industry-Academic Joint Technological Innovations FundP roject of Jiangsu(No.BY2013003-11)the Scientific Innovation Research of College Graduates in Jiangsu Province(No.KYLX_0273)
文摘Precoding and space-time block coding （STBC）techniques using the uniform channel decomposition （UCD）are proposed to improve the bit error rate （BER） of themultiple-antenna communication system, but at a cost of areduced data rate. In order to achieve a higher overall systemperformance, a novel adaptive transceiver architecture whichflexibly combines both UCD and UCD ＋ STBC technologies isproposed. The channel state information （CSI） feedback pathwas added to the precoder to select which coding method wasto be used, i.e. UCD alone or UCD ＋ STBC. With thesmaller constellation sizes, Matlab simulation results showthat, the adaptive transceiver architecture will select the UCD-only mode under the higher SNR conditions in order to achievea higher bit rate. The UCD ＋ STBC mode will be selectedunder the lower SNR conditions （e. g., SNR 〈 10 dB） inorder to maintain good BER performance at the cost of areduced data rate. This architecture was implemented andverified using both UMC 0.18 ASIC process technology and aXilinx xc4vlx Virtex-4 FPGA at 150 MHz. The simulationresults demonstrate that the required number of reconfigurablearithmetic unit slices grows linearly with the channel matrixsize, while the number of adder array unit and reconfigurablelogic unit slices increases slightly with the constellation size.
基金supported by the National Natural Science Foundation of China(No.60806008)the National High Technology Research and Development Program of China(No.2008AA010708)
文摘A reconfigurable multi-mode multi-band transceiver for low power short-range wireless communication applications is presented.Its low intermediate frequency(IF) receiver with 3 MHz IF carrier frequency and the direct-conversion transmitter support reconfigurable signal bandwidths from 250 kHz to 2 MHz and support a highest data rate of 3 Mbps for MSK modulation.An integrated multi-band PLL frequency synthesizer is utilized to provide the quadrature LO signals from about 300 MHz to 1 GHz for the transceiver multi-band application. The transceiver has been implemented in a 0.18μm CMOS process.The measurement results at the maximum gain mode show that the receiver achieves a noise figure(NF) of 4.9/5.5 dB and an input 3rd order intermodulation point(IIP3) of-19.6/-18.2 dBm in 400/900 MHz band.The transmitter working in 400/900 MHz band can deliver 10.2/7.3 dBm power to a 50Ωload.The transceiver consumes 32.9/35.6 mW in receive mode and 47.4/50.1 mW in transmit mode in 400/900 MHz band,respectively.
