COMPARISON AND EVALUATION OF CURRENT REFERENCE GENERATION STRATEGIES FOR ACTIVE POWER FILTERS IN THREE-PHASE FOUR-WIRE SYSTEMS

For three phase four-wire active power filters （APFs）, several typical power theories and corresponding current reference generation strategies are induced, p-q, d-q, unify power factor （UPF） and instantaneous active current （IAC） methods are analyzed and compared with each other. The interpretation of active and reactive currents in non-sinusoidal and unbalanced three-phase four-wire systems is given based on the generalized instantaneous reactive power theory. The performance and the characteristic are evaluated, and the application conditions of current reference generation strategies are concluded. Simulation results under different source voltages and loads verify the evaluation result.

IC Implementation of a Programmable CMOS Voltage Reference

A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV.

Analysis and design of high linearity current reference for current mode circuits

A complementary metal-oxide-semiconductor transistor （CMOS） voltage-to-current（VTC）converter with high linearity for current-mode analog and digital integrated circuits is described. A high gain operational amplifier （OPA） is utilized to form negative feedback. A proportional to absolute temperature （PTAT） current reference with transistors operated in a weak inversion is used as the bias circuit. The resistor and the OPA nonlinearity behavior are analyzed in detail. By optimizing parameters in OPA and adopting a small voltage coefficient polysilicon resistor as a linear device, a high linearity is achieved. The circuit is implemented in a standard 0. 6 μm CMOS technology. The low frequency gain of the OPA exceeds 90 dB. The test results indicate that the total harmonic distortion （THD）is 0. 000 2%. The common-mode input linearity range is 0 to 2. 6 V. Correspondingly, the output current range is 50 to 426μA. The sensitivity of the PTAT current reference to Vdd is approximately 0. 021 7. The chip consumes a power of less than 1.3 mW for a 5 V supply, and occupies an area of 0. 112 mm^2.

A novel low-voltage high precision current reference based on subthreshold MOSFETs

A novel topology low-voltage high precision current reference based on subthreshold Metal-Oxide-Semiconductor Field Effect Transistors （MOSFETs） is presented. The circuit achieves a temperature-independent reference current by a proper combination current of two first-order temperature-compensation current references, which exploit the temperature characteristics of integrated poly2 resistors and the 1- V transconductance characteristics of MOSFET operating in the subthreshold region. The circuit, designed with the 1 st silicon 0.35 μm standard CMOS logic process technology, exhibits a stable current of about 2.25 μA with much low temperature coefficient of 3 × 10^-4μA/℃ in the temperature range of-40-150 ℃ at 1 V supply voltage, and also achieves a better power supply rejection ratio （PSRR） over a broad frequency. The PSRR is about -78 dB at DC and remains -42 dB at the frequency higher than 10 MHz. The maximal process error is about 6,7% based on the Monte Carlo simulation. So it has good process compatibility.

An Integrated Drive for Two PMSMs Involved Automotive Applications and Development of Current Reference Expanded Two Arm Modulation Technique

A five leg inverter (FLI) control is incorporated to drive two independent rated permanent magnet synchronous motors (PMSMs) for automotive applications. Literature evidences many attempts of employing the FLI for controlling two general purpose/special motors, where variety of modulation techniques has been practiced for performance enhancement. Also in these cases one leg of inverter is common to both the motors. The expanded two arm modulation (ETAM) has been generally engaged in FLI. In ETAM the percentage voltage utilization factor (VUF) is calculated based on “αmax”, where “αmax” is the maximum modulation index and equal to and hence it restricts the VUF to 50%. This makes the FLI drives to use the dc link in inefficient way, which is due to the fact that conventional ETAM works with voltage reference. This paper modifies the ETAM in an ingenious way to improve the VUF further through current reference. In addition, the developed current reference expanded two arm modulation (CRETAM) minimizes the current harmonics and torque ripple as well. A detailed comparison of the CRETAM with the conventional ETAM and the competent digital counterpart, space vector pulse width modulation (SVPWM), is also presented. The enhancement in VUF, torque ripple minimization and current total harmonic distortion (THD) reduction are found in the MATLAB based simulation results.

Novel High PSRR Current Reference Based on Subthreshold MOSFETs

This paper takes full advantages of the I-V transconductance characteristics of metal-oxide semiconductor field effect transistor （MOSFET） operating in the subthreshold region and the enhancement pre-regulator technique with the high gain negative feedback loop. The proposed reference circuit, designed with the SMIC 0.18 μm standard complementary metal-oxide semiconductor （CMOS） logic process technology, exhibits a stable current of about 1.701 μA with much low temperature coefficient （TC） of 2.5×10^-4μA/℃ in the temperature range of-40 to 150℃ at 1.5 V supply voltage, and also achieves a best PSRR over a broad frequency. The PSRR is about - 126 dB at DC frequency and remains -92 dB at the frequency higher 100 MHz. Moreover the proposed reference circuit operates stably at the supply voltage higher 1.2 V and has good process compatibility.

A New 1-V Second-Order Temperature-Compensated Current Reference

A new bipolar temperature-compensated current reference is proposed. The first-order temperature compensation is achieved by the idea of self temperature-compensation configuration exploiting the temperature coefficient of a combined resistor. The second-order compensation employs a VBE-tracking thermal-startup technique to obtain improved temperature performance. The proposed circuit can operate down to a 1-V supply. A temperature coefficient of 46.6×10?6/℃ [0, 100℃] at a 1-V supply and a supply regulation of 0.036%/V at 25℃ are achieved. Compared with present works, the proposed circuit shows better results of the temperature coefficient and supply regulation. The current matching issue frequently encountered in current references is also discussed in detail.

A New CMOS Current Reference with High Order Temperature Compensation

A new high order CMOS temperature compensated current reference is proposed in this paper, which is accomplished by two first order temperature compensation current references. The novel circuit exploits the temperature characteristics of integrated-circuit resistors and gate-source voltage of MOS transistors working in weak inversion. The proposed circuit, designed with a 0.6 Izm standard CMOS technology, gives a good temperature coefficient of 31ppm/℃ [-50-100℃] at a 1.8V supply, and also achieves line regulation of 0.01%/V and-120dB PSR at 1 MHz. Comparing with other presented work, the proposed circuit shows better temperature coefficient and Line regulation.

All-CMOS temperature compensated current reference

This paper presents a novel temperature independent current reference based on the theory of mutual compensation of mobility and threshold voltage.It is completely compatible with standard CMOS-technology.The experiment results indicate that the temperature coefficient of this current reference is less than 290 ppm/℃over a temperature range from-20 to 110℃.

New Technique:A low drift current reference based on PMOS temperature correction technology

A low drift current reference based on PMOS temperature correction technology is proposed.To achieve the minimum temperature coefficient(TC),the PMOS cascode current mirror is designed as a cross structure.By exchanging the bias for two layers of the self-biased PMOS cascode structure,the upper PMOS,which is used to adjust the TC together with the resistor of the self-biased PMOS cascode structure,is forced to work in the linear region.As the proposed current reference is the on-chip current reference of a high voltage LED driver with high accuracy,it was designed using a CSMC 1 μm 40 V BCD process.Simulation shows that the TC of the reference current was only 23.8×10 6 /°C over the temperature range of 40-120 °C under the typical condition.

A resistorless CMOS current reference with temperature compensation

A resistorless CMOS current reference is presented.Temperature compensation is achieved by subtracting two sub-currents with different positive temperature coefficients.The circuit has been implemented with a Chartered0.35μm CMOS process.The output current is 1.5μA,and the circuit works properly with a supply voltage down to 2 V.Measurement results show that the temperature coefficient is 98 ppm/℃,and the line regulation is 0.45%/V.The occupied chip area is 0.065 mm;.

A simple and effective method to achieve the successful start-up of a current reference

Start-up design is a critical issue in current reference as it is very closely related to production yield. However, its function is difficult to predict using normal transaction simulations before the device is put into diffusion. In this paper, we discuss a simple and effective simulation approach which ensures a successful start-up process in a self-biased temperature independent current reference. The circuit is implemented in a class-D power amplifier with a 0.35 #m BiCMOS process and the experimental result validates that, by using this method, the start-up success rate can be greatly improved to 100%.