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10Gb/s transmit equalizer using duobinary signaling over FR4 backplane 被引量:1
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作者 张银行 Hu Qingsheng 《High Technology Letters》 EI CAS 2017年第3期266-270,共5页
A 10Gb/s 6-tap transmit equalizer based on partial response signaling for high speed backplane transmission is presented. By combining features of equalizer and frequency-dependent channel,duobinary signaling can be g... A 10Gb/s 6-tap transmit equalizer based on partial response signaling for high speed backplane transmission is presented. By combining features of equalizer and frequency-dependent channel,duobinary signaling can be generated at the output of FR4 backplane,aiming at increasing data rate while reducing design complexity. Based on 0.18μm CMOS technology,this equalizer has been designed and fabricated,in which both variable capacitor and load resistor calibration techniques are explored to eliminate the effect of process variations. The chip occupies 0.68×0.8mm^2 including I/O pads and consumes a power of 194 mW with 1.8V power supply. Measurement results show that a typical 3-level eye diagram can be obtained at the receiver and the equalizer can work properly at the data rate of 10Gb/s. 展开更多
关键词 transmit equalizer duobinary partial response load resistor calibration CMOS technology
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