Multi-type sensor placement and response reconstruction for building structures: Experimental investigations

Estimation of lateral displacement and acceleration responses is essential to assess safety and serviceability of high-rise buildings under dynamic loadings including earthquake excitations. However, the measurement information from the limited number of sensors installed in a building structure is often insufficient for the complete structural performance assessment. An integrated multi-type sensor placement and response reconstruction method has thus been proposed by the authors to tackle this problem. To validate the feasibility and effectiveness of the proposed method, an experimental investigation using a cantilever beam with multi-type sensors is performed and reported in this paper. The experimental setup is first introduced. The finite element modelling and model updating of the cantilever beam are then performed. The optimal sensor placement for the best response reconstruction is determined by the proposed method based on the updated FE model of the beam. After the sensors are installed on the physical cantilever beam, a number of experiments are carried out. The responses at key locations are reconstructed and compared with the measured ones. The reconstructed responses achieve a good match with the measured ones, manifesting the feasibility and effectiveness of the proposed method. Besides, the proposed method is also examined for the cases of different excitations and unknown excitation, and the results prove the proposed method to be robust and effective. The superiority of the optimized sensor placement scheme is finally demonstrated through comparison with two other different sensor placement schemes： the accelerometer-only scheme and non-optimal sensor placement scheme. The proposed method can be applied to high-rise buildings for seismic performance assessment.

Investigation of response time of small footprint photonic crystal AND logic gate

In this paper, the response time of all-optical AND logic gate using the triangular photonic crystal lattice is investigated. The proposed logic gate consists of a photonic crystal nano-resonator formed by changing the size of the dielectric rods. The structure benefits the interference effect mechanism. The contrast ratio of the photonic crystal AND logic gate is obtained as 6 d B. In addition to simplicity, the designed nano-resonator increases the bit rate of logic gate. The delay time and footprint of logic gate are respectively 0.32 ps and 146 μm2. The proposed photonic crystal AND logic gate can operate at a bit rate of 3.12 Tbit/s。