Electromagnetic Modeling of a Planar Structure Integrating a Via-Hole Using the Method FWCIP

We present in this paper a new formulation of the iterative method FWCIP “Fast Wave Concept Iterative Process” based on the wave concept. It calculates the electromagnetic parameters of a planar structure including a via-hole. This is modelled by the electromagnetic field that it creates in the structure. The validation of results found by this new formulation is ensured by comparison with those obtained by HFSS “high frequency structural simulator” software from Ansoft. They show that they are in good agreement.

Vertically Integrated Electronics: New Opportunities from Emerging Materials and Devices

Vertical three-dimensional(3D)integration is a highly attractive strategy to integrate a large number of transistor devices per unit area.This approach has emerged to accommodate the higher demand of data processing capability and to circumvent the scaling limitation.A huge number of research efforts have been attempted to demonstrate vertically stacked electronics in the last two decades.In this review,we revisit materials and devices for the vertically integrated electronics with an emphasis on the emerging semiconductor materials that can be processable by bottom-up fabrication methods,which are suitable for future flexible and wearable electronics.The vertically stacked integrated circuits are reviewed based on the semiconductor materials:organic semiconductors,carbon nanotubes,metal oxide semiconductors,and atomically thin two-dimensional materials including transi-tion metal dichalcogenides.The features,device performance,and fabrication methods for 3D integration of the transistor based on each semiconductor are discussed.Moreover,we highlight recent advances that can be important milestones in the vertically integrated elec-tronics including advanced integrated circuits,sensors,and display systems.There are remaining challenges to overcome;however,we believe that the vertical 3D integration based on emerging semiconductor materials and devices can be a promising strategy for future electronics.

GaAs backside via-hole etching using ICP system

A high etch rate GaAs via-hole process was studied in an inductively coupled plasma system using Cl2/BCl3 gas system. The effects of process parameters on the GaAs etch rate were investigated. The influences of photoresist SiO2; Ni masks on the resultant profiles were also studied by scanning electron microscopy. A maximum etch rate of 8.9 μm/min was obtained; the etched profiles were optimized.