Using quantum algorithms to solve various problems has attracted widespread attention with the development of quantum computing.Researchers are particularly interested in using the acceleration properties of quantum a...Using quantum algorithms to solve various problems has attracted widespread attention with the development of quantum computing.Researchers are particularly interested in using the acceleration properties of quantum algorithms to solve NP-complete problems.This paper focuses on the well-known NP-complete problem of finding the minimum dominating set in undirected graphs.To expedite the search process,a quantum algorithm employing Grover’s search is proposed.However,a challenge arises from the unknown number of solutions for the minimum dominating set,rendering direct usage of original Grover’s search impossible.Thus,a swap test method is introduced to ascertain the number of iterations required.The oracle,diffusion operators,and swap test are designed with achievable quantum gates.The query complexity is O(1.414^(n))and the space complexity is O(n).To validate the proposed approach,qiskit software package is employed to simulate the quantum circuit,yielding the anticipated results.展开更多
Monte Carlo Analysis has been an accepted method for circuit tolerance analysis, but the heavy computational complexity has always prevented its applications. Based on random set theory, this paper presents a simple a...Monte Carlo Analysis has been an accepted method for circuit tolerance analysis, but the heavy computational complexity has always prevented its applications. Based on random set theory, this paper presents a simple and flexible tolerance analysis method to estimate circuit yield. It is the alternative to Monte Carlo analysis, but reduces the number of calculations dramatically.展开更多
针对传统逐次逼近型模/数转换器(Successive Approximation Analog to Digital Converter,SAR ADC)中的电压域比较器存在延迟大、功耗高等问题,本文设计了一款应用于SAR ADC的低功耗时间域比较器。该比较器通过引入高增益的时间放大器(T...针对传统逐次逼近型模/数转换器(Successive Approximation Analog to Digital Converter,SAR ADC)中的电压域比较器存在延迟大、功耗高等问题,本文设计了一款应用于SAR ADC的低功耗时间域比较器。该比较器通过引入高增益的时间放大器(Time Amplifier,TA)成功实现了相位积累速度的指数级增加,有效减小了输入信号相位脱离鉴相器的“死区”所需的振荡周期数,缩短了比较延迟,优化了比较的速度和功耗。该比较器基于65 nm CMOS工艺进行设计,在0.4 V电源电压下功耗仅5.24 nW,失调电压为5.99 mV。展开更多
基金Project supported by the National Natural Science Foundation of China(Grant No.62101600)the Science Foundation of China University of Petroleum,Beijing(Grant No.2462021YJRC008)the State Key Laboratory of Cryptology(Grant No.MMKFKT202109).
文摘Using quantum algorithms to solve various problems has attracted widespread attention with the development of quantum computing.Researchers are particularly interested in using the acceleration properties of quantum algorithms to solve NP-complete problems.This paper focuses on the well-known NP-complete problem of finding the minimum dominating set in undirected graphs.To expedite the search process,a quantum algorithm employing Grover’s search is proposed.However,a challenge arises from the unknown number of solutions for the minimum dominating set,rendering direct usage of original Grover’s search impossible.Thus,a swap test method is introduced to ascertain the number of iterations required.The oracle,diffusion operators,and swap test are designed with achievable quantum gates.The query complexity is O(1.414^(n))and the space complexity is O(n).To validate the proposed approach,qiskit software package is employed to simulate the quantum circuit,yielding the anticipated results.
基金the National Natural Science Foundation of China (No.60772006, 60434020)the Zhejiang Natural Science Foundation (No.R106745, Y1080422).
文摘Monte Carlo Analysis has been an accepted method for circuit tolerance analysis, but the heavy computational complexity has always prevented its applications. Based on random set theory, this paper presents a simple and flexible tolerance analysis method to estimate circuit yield. It is the alternative to Monte Carlo analysis, but reduces the number of calculations dramatically.
文摘针对传统逐次逼近型模/数转换器(Successive Approximation Analog to Digital Converter,SAR ADC)中的电压域比较器存在延迟大、功耗高等问题,本文设计了一款应用于SAR ADC的低功耗时间域比较器。该比较器通过引入高增益的时间放大器(Time Amplifier,TA)成功实现了相位积累速度的指数级增加,有效减小了输入信号相位脱离鉴相器的“死区”所需的振荡周期数,缩短了比较延迟,优化了比较的速度和功耗。该比较器基于65 nm CMOS工艺进行设计,在0.4 V电源电压下功耗仅5.24 nW,失调电压为5.99 mV。